Commit 8bb575a2 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/pp: Save vf state in pp context 



Store vf state in pp_context so we can
deprecate the cgs interface.

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b61e54cb

drivers/gpu/drm/amd/powerplay/amd_powerplay.c

+2 −1
Original line number Diff line number Diff line
@@ -46,7 +46,8 @@ static int amd_powerplay_create(struct amdgpu_device *adev) 
		return -ENOMEM;



	hwmgr->adev = adev;

	hwmgr->pm_en = (amdgpu_dpm != 0 && !amdgpu_sriov_vf(adev)) ? true : false;

	hwmgr->not_vf = !amdgpu_sriov_vf(adev);

	hwmgr->pm_en = (amdgpu_dpm && hwmgr->not_vf) ? true : false;

	hwmgr->device = amdgpu_cgs_create_device(adev);

	mutex_init(&hwmgr->smu_lock);

	hwmgr->chip_family = adev->family;

drivers/gpu/drm/amd/powerplay/inc/hwmgr.h

+1 −0
Original line number Diff line number Diff line
@@ -718,6 +718,7 @@ struct pp_hwmgr { 
	uint32_t chip_family;

	uint32_t chip_id;

	uint32_t smu_version;

	bool not_vf;

	bool pm_en;

	struct mutex smu_lock;

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

+3 −4
Original line number Diff line number Diff line
@@ -288,8 +288,7 @@ static int fiji_start_smu(struct pp_hwmgr *hwmgr) 
	struct fiji_smumgr *priv = (struct fiji_smumgr *)(hwmgr->smu_backend);



	/* Only start SMC if SMC RAM is not running */

	if (!(smu7_is_smc_ram_running(hwmgr)

		|| cgs_is_virtualization_enabled(hwmgr->device))) {

	if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) {

		/* Check if SMU is running in protected mode */

		if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,

				CGS_IND_REG__SMC,
@@ -335,8 +334,8 @@ static bool fiji_is_hw_avfs_present(struct pp_hwmgr *hwmgr) 
	uint32_t efuse = 0;

	uint32_t mask = (1 << ((AVFS_EN_MSB - AVFS_EN_LSB) + 1)) - 1;



	if (cgs_is_virtualization_enabled(hwmgr->device))

		return 0;

	if (!hwmgr->not_vf)

		return false;



	if (!atomctrl_read_efuse(hwmgr->device, AVFS_EN_LSB, AVFS_EN_MSB,

			mask, &efuse)) {

drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c

+1 −2
Original line number Diff line number Diff line
@@ -295,8 +295,7 @@ static int polaris10_start_smu(struct pp_hwmgr *hwmgr) 
	struct polaris10_smumgr *smu_data = (struct polaris10_smumgr *)(hwmgr->smu_backend);



	/* Only start SMC if SMC RAM is not running */

	if (!(smu7_is_smc_ram_running(hwmgr)

		|| cgs_is_virtualization_enabled(hwmgr->device))) {

	if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) {

		smu_data->protected_mode = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_MODE));

		smu_data->smu7_data.security_hard_key = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_SEL));

drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c

+5 −5
Original line number Diff line number Diff line
@@ -375,7 +375,7 @@ static int smu7_populate_single_firmware_entry(struct pp_hwmgr *hwmgr, 
		entry->meta_data_addr_low = 0;



		/* digest need be excluded out */

		if (cgs_is_virtualization_enabled(hwmgr->device))

		if (!hwmgr->not_vf)

			info.image_size -= 20;

		entry->data_size_byte = info.image_size;

		entry->num_register_entries = 0;
@@ -409,7 +409,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr) 
					0x0);



	if (hwmgr->chip_id > CHIP_TOPAZ) { /* add support for Topaz */

		if (!cgs_is_virtualization_enabled(hwmgr->device)) {

		if (hwmgr->not_vf) {

			smu7_send_msg_to_smc_with_parameter(hwmgr,

						PPSMC_MSG_SMU_DRAM_ADDR_HI,

						upper_32_bits(smu_data->smu_buffer.mc_addr));
@@ -467,7 +467,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr) 
	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,

				UCODE_ID_SDMA1, &toc->entry[toc->num_entries++]),

				"Failed to Get Firmware Entry.", return -EINVAL);

	if (cgs_is_virtualization_enabled(hwmgr->device))

	if (!hwmgr->not_vf)

		PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,

				UCODE_ID_MEC_STORAGE, &toc->entry[toc->num_entries++]),

				"Failed to Get Firmware Entry.", return -EINVAL);
@@ -608,7 +608,7 @@ int smu7_init(struct pp_hwmgr *hwmgr) 
	smu_data->header = smu_data->header_buffer.kaddr;

	smu_data->header_buffer.mc_addr = mc_addr;



	if (cgs_is_virtualization_enabled(hwmgr->device))

	if (!hwmgr->not_vf)

		return 0;



	smu_data->smu_buffer.data_size = 200*4096;
@@ -643,7 +643,7 @@ int smu7_smu_fini(struct pp_hwmgr *hwmgr) 
					&smu_data->header_buffer.mc_addr,

					&smu_data->header_buffer.kaddr);



	if (!cgs_is_virtualization_enabled(hwmgr->device))

	if (hwmgr->not_vf)

		amdgpu_bo_free_kernel(&smu_data->smu_buffer.handle,

					&smu_data->smu_buffer.mc_addr,

					&smu_data->smu_buffer.kaddr);