Commit 8cfb722b authored by Sergio Paracuellos's avatar Sergio Paracuellos Committed by Greg Kroah-Hartman
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staging: mt7621-pci: add comment clarifying inverted reset lines 



To avoid people reading this code being very confused, add a comment
clarifying the need for invert resets on some chip revisions.

Suggested-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f9bb8409

drivers/staging/mt7621-pci/pci-mt7621.c

+4 −0
Original line number Diff line number Diff line
@@ -589,6 +589,10 @@ static int mt7621_pcie_init_port(struct mt7621_pcie_port *port) 
	u32 slot = port->slot;

	u32 val = 0;



	/*

	 * Any MT7621 Ralink pcie controller that doesn't have 0x0101 at

	 * the end of the chip_id has inverted PCI resets.

	 */

	mt7621_reset_port(port);



	val = read_config(pcie, slot, PCIE_FTS_NUM);