Unverified Commit 8d2214d3 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-dt64-5.16' of... 

Merge tag 'imx-dt64-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree changes for 5.16:

- New board support: LX2160A based BlueBox3, S32G2 EVB and RDB2 boards.
- Quite some updates on imx8mq-librem5 board: delay the startup of the
  SDIO, add power sequencing for M.2 cards, add wifi regulator, add
  panel reset GPIO, fix led_r and led_g pinctrl, etc.
- Fix the SPI chipselect polarity for a couple of i.MX8MM boards.
- Add GPU nodes for i.MX8MM 2D and 3D core.
- Add VPU and DISP blk-ctrl devices for i.MX8MM.
- A series from Michael Walle to LS1028A device trees and add GPU
  support.
- Random and small updates on various boards.

* tag 'imx-dt64-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (37 commits)
  arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card
  arm64: dts: imx8mm-venice-gw7901.dts: disable pgc_gpumix
  arm64: dts: imx8mq-librem5: set debounce interval of volume buttons to 50ms
  arm64: dts: imx8mq-librem5: Limit the max sdio frequency
  arm64: dts: imx8mq-librem5: add power sequencing for M.2 cards
  arm64: dts: imx8mq-librem5: delay the startup of the SDIO
  arm64: dts: imx8mq-librem5: wire up the wifi regulator
  arm64: dts: imx8mq-librem5: Fix led_r and led_g pinctrl assignments
  arm64: dts: imx8mq-librem5: add reset gpio to mantix panel description
  arm64: dts: imx8mm-kontron: Fix reset delays for ethernet PHY
  arm64: dts: imx8mm: add DISP blk-ctrl
  arm64: dts: imx8mm: add VPU blk-ctrl
  arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core
  arm64: dts: imx8mm: put USB controllers into power-domains
  arm64: dts: imx8mm: add GPC node
  arm64: dts: ls1028a: mark internal links between Felix and ENETC as capable of flow control
  arm64: dts: freescale: Fix 'interrupt-map' parent address cells
  arm64: dts: ls1028a: use phy-mode instead of phy-connection-type
  arm64: dts: ls1028a: move PHY nodes to MDIO controller
  arm64: dts: ls1028a: disable usb controller by default
  ...

Link: https://lore.kernel.org/r/20211016140138.1603-4-shawnguo@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 8bd8822c ec1e91d4

arch/arm64/boot/dts/freescale/Makefile

+4 −0
Original line number Diff line number Diff line
@@ -25,6 +25,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb 
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-bluebox3.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-bluebox3-rev-a.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-clearfog-cx.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
@@ -70,4 +72,6 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb 
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb



dtb-$(CONFIG_ARCH_S32) += s32g274a-evb.dtb

dtb-$(CONFIG_ARCH_S32) += s32g274a-rdb2.dtb

dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb

arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ / { 
	compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";



	aliases {

		serial0 = &duart0;

		mmc0 = &esdhc0;

		mmc1 = &esdhc1;

	};

arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts

+28 −32
Original line number Diff line number Diff line
@@ -8,7 +8,7 @@ 
 * None of the  four SerDes lanes are used by the module, instead they are

 * all led out to the carrier for customer use.

 *

 * Copyright (C) 2020 Michael Walle <michael@walle.cc>

 * Copyright (C) 2021 Michael Walle <michael@walle.cc>

 *

 */
@@ -21,24 +21,9 @@ / { 
	compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a";

};



&enetc_port0 {

	status = "disabled";

	/*

	 * Delete both the phy-handle to the old phy0 label as well as

	 * the mdio node with the old phy node with the old phy0 label.

	 */

	/delete-property/ phy-handle;

	/delete-node/ mdio;

};



&enetc_port1 {

	phy-handle = <&phy0>;

	phy-connection-type = "rgmii-id";

	status = "okay";



	mdio {

		#address-cells = <1>;

		#size-cells = <0>;

&enetc_mdio_pf3 {

	/* Delete unused phy node */

	/delete-node/ ethernet-phy@5;



	phy0: ethernet-phy@4 {

		reg = <0x4>;
@@ -60,4 +45,15 @@ vddh: vddh-regulator { 
		};

	};

};



&enetc_port0 {

	status = "disabled";

	/* Delete the phy-handle to the old phy0 label */

	/delete-property/ phy-handle;

};



&enetc_port1 {

	phy-handle = <&phy0>;

	phy-mode = "rgmii-id";

	status = "okay";

};

arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dts

+4 −13
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 
 * This is for the network variant 2 which has two ethernet ports. These

 * ports are connected to the internal switch.

 *

 * Copyright (C) 2020 Michael Walle <michael@walle.cc>

 * Copyright (C) 2021 Michael Walle <michael@walle.cc>

 *

 */
@@ -18,12 +18,6 @@ / { 
};



&enetc_mdio_pf3 {

	phy0: ethernet-phy@5 {

		reg = <0x5>;

		eee-broken-1000t;

		eee-broken-100tx;

	};



	phy1: ethernet-phy@4 {

		reg = <0x4>;

		eee-broken-1000t;
@@ -34,14 +28,11 @@ phy1: ethernet-phy@4 { 
&enetc_port0 {

	status = "disabled";

	/*

	 * In the base device tree the PHY was registered in the mdio

	 * subnode as it is PHY for this port. On this module this PHY

	 * is connected to a switch port instead and registered above.

	 * Therefore, delete the mdio subnode as well as the phy-handle

	 * property here.

	 * In the base device tree the PHY at address 5 was assigned for

	 * this port. On this module this PHY is connected to a switch

	 * port instead. Therefore, delete the phy-handle property here.

	 */

	/delete-property/ phy-handle;

	/delete-node/ mdio;

};



&enetc_port2 {

arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts

+23 −26
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 
 * This is for the network variant 4 which has two ethernet ports. It

 * extends the base and provides one more port connected via RGMII.

 *

 * Copyright (C) 2019 Michael Walle <michael@walle.cc>

 * Copyright (C) 2021 Michael Walle <michael@walle.cc>

 *

 */
@@ -18,15 +18,7 @@ / { 
	compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a";

};



&enetc_port1 {

	phy-handle = <&phy1>;

	phy-connection-type = "rgmii-id";

	status = "okay";



	mdio {

		#address-cells = <1>;

		#size-cells = <0>;



&enetc_mdio_pf3 {

	phy1: ethernet-phy@4 {

		reg = <0x4>;

		eee-broken-1000t;
@@ -47,4 +39,9 @@ vddh: vddh-regulator { 
		};

	};

};



&enetc_port1 {

	phy-handle = <&phy1>;

	phy-mode = "rgmii-id";

	status = "okay";

};