Commit 8d93b7a2 authored by Will Deacon's avatar Will Deacon
Browse files

Merge branch 'for-next/fpsimd' into for-next/core 

* for-next/fpsimd:
  arm64: cpufeature: Warn if we attempt to read a zero width field
  arm64: cpufeature: Add missing .field_width for GIC system registers
  arm64: signal: nofpsimd: Do not allocate fp/simd context when not available
  arm64: cpufeature: Always specify and use a field width for capabilities
  arm64: Always use individual bits in CPACR floating point enables
  arm64: Define CPACR_EL1_FPEN similarly to other floating point controls
parents 515e5da7 f2c28120

arch/arm64/include/asm/cpufeature.h

+3 −0
Original line number Diff line number Diff line
@@ -356,6 +356,7 @@ struct arm64_cpu_capabilities { 
		struct {	/* Feature register checking */

			u32 sys_reg;

			u8 field_pos;

			u8 field_width;

			u8 min_field_value;

			u8 hwcap_type;

			bool sign;
@@ -576,6 +577,8 @@ static inline u64 arm64_ftr_reg_user_value(const struct arm64_ftr_reg *reg) 
static inline int __attribute_const__

cpuid_feature_extract_field_width(u64 features, int field, int width, bool sign)

{

	if (WARN_ON_ONCE(!width))

		width = 4;

	return (sign) ?

		cpuid_feature_extract_signed_field_width(features, field, width) :

		cpuid_feature_extract_unsigned_field_width(features, field, width);

arch/arm64/include/asm/kvm_arm.h

+2 −2
Original line number Diff line number Diff line
@@ -355,8 +355,8 @@ 
	ECN(SOFTSTP_CUR), ECN(WATCHPT_LOW), ECN(WATCHPT_CUR), \

	ECN(BKPT32), ECN(VECTOR32), ECN(BRK64)



#define CPACR_EL1_FPEN		(3 << 20)

#define CPACR_EL1_TTA		(1 << 28)

#define CPACR_EL1_DEFAULT	(CPACR_EL1_FPEN | CPACR_EL1_ZEN_EL1EN)

#define CPACR_EL1_DEFAULT	(CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN |\

				 CPACR_EL1_ZEN_EL1EN)



#endif /* __ARM64_KVM_ARM_H__ */

arch/arm64/include/asm/sysreg.h

+3 −1
Original line number Diff line number Diff line
@@ -1109,9 +1109,11 @@ 
#define ZCR_ELx_LEN_SIZE	9

#define ZCR_ELx_LEN_MASK	0x1ff



#define CPACR_EL1_FPEN_EL1EN	(BIT(20)) /* enable EL1 access */

#define CPACR_EL1_FPEN_EL0EN	(BIT(21)) /* enable EL0 access, if EL1EN set */



#define CPACR_EL1_ZEN_EL1EN	(BIT(16)) /* enable EL1 access */

#define CPACR_EL1_ZEN_EL0EN	(BIT(17)) /* enable EL0 access, if EL1EN set */

#define CPACR_EL1_ZEN		(CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN)



/* GCR_EL1 Definitions */

#define SYS_GCR_EL1_RRND	(BIT(16))

arch/arm64/kernel/cpufeature.c

+107 −69

File changed.

Preview size limit exceeded, changes collapsed.

arch/arm64/kernel/signal.c

+6 −4
Original line number Diff line number Diff line
@@ -576,10 +576,12 @@ static int setup_sigframe_layout(struct rt_sigframe_user_layout *user, 
{

	int err;



	if (system_supports_fpsimd()) {

		err = sigframe_alloc(user, &user->fpsimd_offset,

				     sizeof(struct fpsimd_context));

		if (err)

			return err;

	}



	/* fault information, if valid */

	if (add_all || current->thread.fault_code) {