Commit 8f3fc0ed authored by Sam Protsenko's avatar Sam Protsenko Committed by Krzysztof Kozlowski
Browse files

dt-bindings: clock: exynos850: Add Exynos850 CMU_MFCMSCL 



CMU_MFCMSCL generates MFC, M2M, MCSC and JPEG clocks for BLK_MFCMSCL.
Add clock indices and binding documentation for CMU_MFCMSCL.

Signed-off-by: default avatarSam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-4-semen.protsenko@linaro.org
parent f20f35f4

Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml

+25 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ properties: 
      - samsung,exynos850-cmu-dpu

      - samsung,exynos850-cmu-hsi

      - samsung,exynos850-cmu-is

      - samsung,exynos850-cmu-mfcmscl

      - samsung,exynos850-cmu-peri



  clocks:
@@ -216,6 +217,30 @@ allOf: 
            - const: dout_is_vra

            - const: dout_is_gdc



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos850-cmu-mfcmscl



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: Multi-Format Codec clock (from CMU_TOP)

            - description: Memory to Memory Scaler clock (from CMU_TOP)

            - description: Multi-Channel Scaler clock (from CMU_TOP)

            - description: JPEG codec clock (from CMU_TOP)



        clock-names:

          items:

            - const: oscclk

            - const: dout_mfcmscl_mfc

            - const: dout_mfcmscl_m2m

            - const: dout_mfcmscl_mcsc

            - const: dout_mfcmscl_jpeg



  - if:

      properties:

        compatible:

include/dt-bindings/clock/exynos850.h

+31 −1
Original line number Diff line number Diff line
@@ -73,7 +73,19 @@ 
#define CLK_DOUT_IS_ITP			61

#define CLK_DOUT_IS_VRA			62

#define CLK_DOUT_IS_GDC			63

#define TOP_NR_CLK			64

#define CLK_MOUT_MFCMSCL_MFC		64

#define CLK_MOUT_MFCMSCL_M2M		65

#define CLK_MOUT_MFCMSCL_MCSC		66

#define CLK_MOUT_MFCMSCL_JPEG		67

#define CLK_GOUT_MFCMSCL_MFC		68

#define CLK_GOUT_MFCMSCL_M2M		69

#define CLK_GOUT_MFCMSCL_MCSC		70

#define CLK_GOUT_MFCMSCL_JPEG		71

#define CLK_DOUT_MFCMSCL_MFC		72

#define CLK_DOUT_MFCMSCL_M2M		73

#define CLK_DOUT_MFCMSCL_MCSC		74

#define CLK_DOUT_MFCMSCL_JPEG		75

#define TOP_NR_CLK			76



/* CMU_APM */

#define CLK_RCO_I3C_PMIC		1
@@ -225,6 +237,24 @@ 
#define CLK_GOUT_IS_SYSREG_PCLK		23

#define IS_NR_CLK			24



/* CMU_MFCMSCL */

#define CLK_MOUT_MFCMSCL_MFC_USER		1

#define CLK_MOUT_MFCMSCL_M2M_USER		2

#define CLK_MOUT_MFCMSCL_MCSC_USER		3

#define CLK_MOUT_MFCMSCL_JPEG_USER		4

#define CLK_DOUT_MFCMSCL_BUSP			5

#define CLK_GOUT_MFCMSCL_CMU_MFCMSCL_PCLK	6

#define CLK_GOUT_MFCMSCL_TZPC_PCLK		7

#define CLK_GOUT_MFCMSCL_JPEG_ACLK		8

#define CLK_GOUT_MFCMSCL_M2M_ACLK		9

#define CLK_GOUT_MFCMSCL_MCSC_CLK		10

#define CLK_GOUT_MFCMSCL_MFC_ACLK		11

#define CLK_GOUT_MFCMSCL_PPMU_ACLK		12

#define CLK_GOUT_MFCMSCL_PPMU_PCLK		13

#define CLK_GOUT_MFCMSCL_SYSMMU_CLK		14

#define CLK_GOUT_MFCMSCL_SYSREG_PCLK		15

#define MFCMSCL_NR_CLK				16



/* CMU_PERI */

#define CLK_MOUT_PERI_BUS_USER		1

#define CLK_MOUT_PERI_UART_USER		2