Commit 8fb5c147 authored by Roger Quadros's avatar Roger Quadros Committed by Tony Lindgren
Browse files

dt-bindings: mtd: Remove gpmc-nor.txt 



There is no GPMC NOR compatible or device driver. GPMC is just
a bus interface over which standard (CFI/JEDC) NOR Flash chips
can be attached.

For NOR chip bindings, please refer to
Documentation/devicetree/bindings/mtd/mtd-physmap.yaml

Signed-off-by: default avatarRoger Quadros <rogerq@kernel.org>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 6880fa6c

Documentation/devicetree/bindings/mtd/gpmc-nor.txt

deleted100644 → 0
+0 −98
Original line number Diff line number Diff line 
Device tree bindings for NOR flash connect to TI GPMC



NOR flash connected to the TI GPMC (found on OMAP boards) are represented as

child nodes of the GPMC controller with a name of "nor".



All timing relevant properties as well as generic GPMC child properties are

explained in a separate documents. Please refer to

Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt



Required properties:

- bank-width: 		Width of NOR flash in bytes. GPMC supports 8-bit and

			16-bit devices and so must be either 1 or 2 bytes.

- compatible:		Documentation/devicetree/bindings/mtd/mtd-physmap.yaml

- gpmc,cs-on-ns:		Chip-select assertion time

- gpmc,cs-rd-off-ns:	Chip-select de-assertion time for reads

- gpmc,cs-wr-off-ns:	Chip-select de-assertion time for writes

- gpmc,oe-on-ns:	Output-enable assertion time

- gpmc,oe-off-ns:	Output-enable de-assertion time

- gpmc,we-on-ns		Write-enable assertion time

- gpmc,we-off-ns:	Write-enable de-assertion time

- gpmc,access-ns:	Start cycle to first data capture (read access)

- gpmc,rd-cycle-ns:	Total read cycle time

- gpmc,wr-cycle-ns:	Total write cycle time

- linux,mtd-name:	Documentation/devicetree/bindings/mtd/mtd-physmap.yaml

- reg:			Chip-select, base address (relative to chip-select)

			and size of NOR flash. Note that base address will be

			typically 0 as this is the start of the chip-select.



Optional properties:

- gpmc,XXX		Additional GPMC timings and settings parameters. See

			Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt



Optional properties for partition table parsing:

- #address-cells: should be set to 1

- #size-cells: should be set to 1



Example:



gpmc: gpmc@6e000000 {

	compatible = "ti,omap3430-gpmc", "simple-bus";

	ti,hwmods = "gpmc";

	reg = <0x6e000000 0x1000>;

	interrupts = <20>;

	gpmc,num-cs = <8>;

	gpmc,num-waitpins = <4>;

	#address-cells = <2>;

	#size-cells = <1>;



	ranges = <0 0 0x10000000 0x08000000>;



	nor@0,0 {

		compatible = "cfi-flash";

		linux,mtd-name= "intel,pf48f6000m0y1be";

		#address-cells = <1>;

		#size-cells = <1>;

		reg = <0 0 0x08000000>;

		bank-width = <2>;



		gpmc,mux-add-data;

		gpmc,cs-on-ns = <0>;

		gpmc,cs-rd-off-ns = <186>;

		gpmc,cs-wr-off-ns = <186>;

		gpmc,adv-on-ns = <12>;

		gpmc,adv-rd-off-ns = <48>;

		gpmc,adv-wr-off-ns = <48>;

		gpmc,oe-on-ns = <54>;

		gpmc,oe-off-ns = <168>;

		gpmc,we-on-ns = <54>;

		gpmc,we-off-ns = <168>;

		gpmc,rd-cycle-ns = <186>;

		gpmc,wr-cycle-ns = <186>;

		gpmc,access-ns = <114>;

		gpmc,page-burst-access-ns = <6>;

		gpmc,bus-turnaround-ns = <12>;

		gpmc,cycle2cycle-delay-ns = <18>;

		gpmc,wr-data-mux-bus-ns = <90>;

		gpmc,wr-access-ns = <186>;

		gpmc,cycle2cycle-samecsen;

		gpmc,cycle2cycle-diffcsen;



		partition@0 {

			label = "bootloader-nor";

			reg = <0 0x40000>;

		};

		partition@40000 {

			label = "params-nor";

			reg = <0x40000 0x40000>;

		};

		partition@80000 {

			label = "kernel-nor";

			reg = <0x80000 0x200000>;

		};

		partition@280000 {

			label = "filesystem-nor";

			reg = <0x240000 0x7d80000>;

		};

	};

};