Commit 8fe25ba3 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
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arm64: dts: qcom: sdm845: rename labels for DSI nodes



Currently in board files MDSS and DSI nodes stay apart, because labels
for DSI nodes do not have the mdss_ prefix. It was found that grouping
all display-related notes is more useful.

To keep all display-related nodes close in the board files, change DSI
node labels from dsi_* to mdss_dsi_*.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230531011623.3808538-12-dmitry.baryshkov@linaro.org
parent 8e61d532
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+20 −20
Original line number Diff line number Diff line
@@ -636,25 +636,6 @@ src_pp600_s3c: smps3 {
	};
};

&dsi0 {
	status = "okay";
	vdda-supply = <&vdda_mipi_dsi0_1p2>;

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&sn65dsi86_in>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&dsi0_phy {
	status = "okay";
	vdds-supply = <&vdda_mipi_dsi0_pll>;
};

edp_brij_i2c: &i2c3 {
	status = "okay";
	clock-frequency = <400000>;
@@ -687,7 +668,7 @@ ports {
			port@0 {
				reg = <0>;
				sn65dsi86_in: endpoint {
					remote-endpoint = <&dsi0_out>;
					remote-endpoint = <&mdss_dsi0_out>;
				};
			};

@@ -767,6 +748,25 @@ &mdss {
	status = "okay";
};

&mdss_dsi0 {
	status = "okay";
	vdda-supply = <&vdda_mipi_dsi0_1p2>;

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&sn65dsi86_in>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&mdss_dsi0_phy {
	status = "okay";
	vdds-supply = <&vdda_mipi_dsi0_pll>;
};

/*
 * Cheza fw does not properly program the GPU aperture to allow the
 * GPU to update the SMMU pagetables for context switches.  Work
+49 −49
Original line number Diff line number Diff line
@@ -415,53 +415,6 @@ &cdsp_pas {
	firmware-name = "qcom/sdm845/cdsp.mbn";
};

&dsi0 {
	status = "okay";
	vdda-supply = <&vreg_l26a_1p2>;

	qcom,dual-dsi-mode;
	qcom,master-dsi;

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&lt9611_a>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&dsi0_phy {
	status = "okay";
	vdds-supply = <&vreg_l1a_0p875>;
};

&dsi1 {
	vdda-supply = <&vreg_l26a_1p2>;

	qcom,dual-dsi-mode;

	/* DSI1 is slave, so use DSI0 clocks */
	assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;

	status = "okay";

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&lt9611_b>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&dsi1_phy {
	vdds-supply = <&vreg_l1a_0p875>;
	status = "okay";
};

&gcc {
	protected-clocks = <GCC_QSPI_CORE_CLK>,
			   <GCC_QSPI_CORE_CLK_SRC>,
@@ -517,7 +470,7 @@ port@0 {
				reg = <0>;

				lt9611_a: endpoint {
					remote-endpoint = <&dsi0_out>;
					remote-endpoint = <&mdss_dsi0_out>;
				};
			};

@@ -525,7 +478,7 @@ port@1 {
				reg = <1>;

				lt9611_b: endpoint {
					remote-endpoint = <&dsi1_out>;
					remote-endpoint = <&mdss_dsi1_out>;
				};
			};

@@ -556,6 +509,53 @@ &mdss {
	status = "okay";
};

&mdss_dsi0 {
	status = "okay";
	vdda-supply = <&vreg_l26a_1p2>;

	qcom,dual-dsi-mode;
	qcom,master-dsi;

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&lt9611_a>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&mdss_dsi0_phy {
	status = "okay";
	vdds-supply = <&vreg_l1a_0p875>;
};

&mdss_dsi1 {
	vdda-supply = <&vreg_l26a_1p2>;

	qcom,dual-dsi-mode;

	/* DSI1 is slave, so use DSI0 clocks */
	assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;

	status = "okay";

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&lt9611_b>;
				data-lanes = <0 1 2 3>;
			};
		};
	};
};

&mdss_dsi1_phy {
	vdds-supply = <&vreg_l1a_0p875>;
	status = "okay";
};

&mss_pil {
	status = "okay";
	firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
+43 −43
Original line number Diff line number Diff line
@@ -417,7 +417,43 @@ &cdsp_pas {
	firmware-name = "qcom/sdm845/cdsp.mdt";
};

&dsi0 {
&gcc {
	protected-clocks = <GCC_QSPI_CORE_CLK>,
			   <GCC_QSPI_CORE_CLK_SRC>,
			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
			   <GCC_LPASS_Q6_AXI_CLK>,
			   <GCC_LPASS_SWAY_CLK>;
};

&gmu {
	status = "okay";
};

&gpu {
	status = "okay";

	zap-shader {
		memory-region = <&gpu_mem>;
		firmware-name = "qcom/sdm845/a630_zap.mbn";
	};
};

&i2c10 {
	status = "okay";
	clock-frequency = <400000>;
};

&ipa {
	qcom,gsi-loader = "self";
	memory-region = <&ipa_fw_mem>;
	status = "okay";
};

&mdss {
	status = "okay";
};

&mdss_dsi0 {
	status = "okay";
	vdda-supply = <&vdda_mipi_dsi0_1p2>;

@@ -448,33 +484,33 @@ ports {
			port@0 {
				reg = <0>;
				truly_in_0: endpoint {
					remote-endpoint = <&dsi0_out>;
					remote-endpoint = <&mdss_dsi0_out>;
				};
			};

			port@1 {
				reg = <1>;
				truly_in_1: endpoint {
					remote-endpoint = <&dsi1_out>;
					remote-endpoint = <&mdss_dsi1_out>;
				};
			};
		};
	};
};

&dsi0_phy {
&mdss_dsi0_phy {
	status = "okay";
	vdds-supply = <&vdda_mipi_dsi0_pll>;
};

&dsi1 {
&mdss_dsi1 {
	status = "okay";
	vdda-supply = <&vdda_mipi_dsi1_1p2>;

	qcom,dual-dsi-mode;

	/* DSI1 is slave, so use DSI0 clocks */
	assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
	assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;

	ports {
		port@1 {
@@ -486,47 +522,11 @@ endpoint {
	};
};

&dsi1_phy {
&mdss_dsi1_phy {
	status = "okay";
	vdds-supply = <&vdda_mipi_dsi1_pll>;
};

&gcc {
	protected-clocks = <GCC_QSPI_CORE_CLK>,
			   <GCC_QSPI_CORE_CLK_SRC>,
			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
			   <GCC_LPASS_Q6_AXI_CLK>,
			   <GCC_LPASS_SWAY_CLK>;
};

&gmu {
	status = "okay";
};

&gpu {
	status = "okay";

	zap-shader {
		memory-region = <&gpu_mem>;
		firmware-name = "qcom/sdm845/a630_zap.mbn";
	};
};

&i2c10 {
	status = "okay";
	clock-frequency = <400000>;
};

&ipa {
	qcom,gsi-loader = "self";
	memory-region = <&ipa_fw_mem>;
	status = "okay";
};

&mdss {
	status = "okay";
};

&mss_pil {
	status = "okay";
	firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
+38 −38
Original line number Diff line number Diff line
@@ -336,44 +336,6 @@ &cdsp_pas {
	firmware-name = "qcom/sdm845/oneplus6/cdsp.mbn";
};

&dsi0 {
	status = "okay";
	vdda-supply = <&vdda_mipi_dsi0_1p2>;

	/*
	 * Both devices use different panels but all other properties
	 * are common. Compatible line is declared in device dts.
	 */
	display_panel: panel@0 {
		status = "disabled";

		reg = <0>;

		vddio-supply = <&vreg_l14a_1p88>;

		reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;

		pinctrl-names = "default";
		pinctrl-0 = <&panel_reset_pins &panel_te_pin &panel_esd_pin>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&dsi0_out>;
			};
		};
	};
};

&dsi0_out {
	remote-endpoint = <&panel_in>;
	data-lanes = <0 1 2 3>;
};

&dsi0_phy {
	status = "okay";
	vdds-supply = <&vdda_mipi_dsi0_pll>;
};

&gcc {
	protected-clocks = <GCC_QSPI_CORE_CLK>,
				<GCC_QSPI_CORE_CLK_SRC>,
@@ -452,6 +414,44 @@ &mdss {
	status = "okay";
};

&mdss_dsi0 {
	status = "okay";
	vdda-supply = <&vdda_mipi_dsi0_1p2>;

	/*
	 * Both devices use different panels but all other properties
	 * are common. Compatible line is declared in device dts.
	 */
	display_panel: panel@0 {
		status = "disabled";

		reg = <0>;

		vddio-supply = <&vreg_l14a_1p88>;

		reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;

		pinctrl-names = "default";
		pinctrl-0 = <&panel_reset_pins &panel_te_pin &panel_esd_pin>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&mdss_dsi0_out>;
			};
		};
	};
};

&mdss_dsi0_out {
	remote-endpoint = <&panel_in>;
	data-lanes = <0 1 2 3>;
};

&mdss_dsi0_phy {
	status = "okay";
	vdds-supply = <&vdda_mipi_dsi0_pll>;
};

/* Modem/wifi */
&mss_pil {
	status = "okay";
+38 −38
Original line number Diff line number Diff line
@@ -411,44 +411,6 @@ &cdsp_pas {
	firmware-name = "qcom/sdm845/axolotl/cdsp.mbn";
};

&dsi0 {
	status = "okay";
	vdda-supply = <&vdda_mipi_dsi0_1p2>;

	panel@0 {
		compatible = "visionox,rm69299-shift";
		status = "okay";
		reg = <0>;
		vdda-supply = <&vreg_l14a_1p88>;
		vdd3p3-supply = <&vreg_l28a_3p0>;

		#address-cells = <1>;
		#size-cells = <0>;

		reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&sde_dsi_active &sde_te_active>;
		pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;

		port {
			panel_in_0: endpoint {
				remote-endpoint = <&dsi0_out>;
			};
		};
	};
};

&dsi0_out {
	remote-endpoint = <&panel_in_0>;
	data-lanes = <0 1 2 3>;
};

&dsi0_phy {
	status = "okay";
	vdds-supply = <&vdda_mipi_dsi0_pll>;
};

&gcc {
	protected-clocks = <GCC_QSPI_CORE_CLK>,
			   <GCC_QSPI_CORE_CLK_SRC>,
@@ -509,6 +471,44 @@ &mdss {
	status = "okay";
};

&mdss_dsi0 {
	status = "okay";
	vdda-supply = <&vdda_mipi_dsi0_1p2>;

	panel@0 {
		compatible = "visionox,rm69299-shift";
		status = "okay";
		reg = <0>;
		vdda-supply = <&vreg_l14a_1p88>;
		vdd3p3-supply = <&vreg_l28a_3p0>;

		#address-cells = <1>;
		#size-cells = <0>;

		reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&sde_dsi_active &sde_te_active>;
		pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;

		port {
			panel_in_0: endpoint {
				remote-endpoint = <&mdss_dsi0_out>;
			};
		};
	};
};

&mdss_dsi0_out {
	remote-endpoint = <&panel_in_0>;
	data-lanes = <0 1 2 3>;
};

&mdss_dsi0_phy {
	status = "okay";
	vdds-supply = <&vdda_mipi_dsi0_pll>;
};

&mss_pil {
	status = "okay";
	firmware-name = "qcom/sdm845/axolotl/mba.mbn", "qcom/sdm845/axolotl/modem.mbn";
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