Loading arch/arm/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -51,6 +51,8 @@ config ARM select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND select HAVE_OPROFILE if (HAVE_PERF_EVENTS) select HAVE_PERF_EVENTS select HAVE_PERF_REGS select HAVE_PERF_USER_STACK_DUMP select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_SYSCALL_TRACEPOINTS select HAVE_UID16 Loading arch/arm/include/uapi/asm/Kbuild +1 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ header-y += hwcap.h header-y += ioctls.h header-y += kvm_para.h header-y += mman.h header-y += perf_regs.h header-y += posix_types.h header-y += ptrace.h header-y += setup.h Loading arch/arm/include/uapi/asm/perf_regs.h 0 → 100644 +23 −0 Original line number Diff line number Diff line #ifndef _ASM_ARM_PERF_REGS_H #define _ASM_ARM_PERF_REGS_H enum perf_event_arm_regs { PERF_REG_ARM_R0, PERF_REG_ARM_R1, PERF_REG_ARM_R2, PERF_REG_ARM_R3, PERF_REG_ARM_R4, PERF_REG_ARM_R5, PERF_REG_ARM_R6, PERF_REG_ARM_R7, PERF_REG_ARM_R8, PERF_REG_ARM_R9, PERF_REG_ARM_R10, PERF_REG_ARM_FP, PERF_REG_ARM_IP, PERF_REG_ARM_SP, PERF_REG_ARM_LR, PERF_REG_ARM_PC, PERF_REG_ARM_MAX, }; #endif /* _ASM_ARM_PERF_REGS_H */ arch/arm/kernel/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -78,6 +78,7 @@ obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_PERF_EVENTS) += perf_regs.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o Loading arch/arm/kernel/perf_event.c +1 −2 Original line number Diff line number Diff line Loading @@ -256,12 +256,11 @@ validate_event(struct pmu_hw_events *hw_events, struct perf_event *event) { struct arm_pmu *armpmu = to_arm_pmu(event->pmu); struct pmu *leader_pmu = event->group_leader->pmu; if (is_software_event(event)) return 1; if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF) if (event->state < PERF_EVENT_STATE_OFF) return 1; if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec) Loading Loading
arch/arm/Kconfig +2 −0 Original line number Diff line number Diff line Loading @@ -51,6 +51,8 @@ config ARM select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND select HAVE_OPROFILE if (HAVE_PERF_EVENTS) select HAVE_PERF_EVENTS select HAVE_PERF_REGS select HAVE_PERF_USER_STACK_DUMP select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_SYSCALL_TRACEPOINTS select HAVE_UID16 Loading
arch/arm/include/uapi/asm/Kbuild +1 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ header-y += hwcap.h header-y += ioctls.h header-y += kvm_para.h header-y += mman.h header-y += perf_regs.h header-y += posix_types.h header-y += ptrace.h header-y += setup.h Loading
arch/arm/include/uapi/asm/perf_regs.h 0 → 100644 +23 −0 Original line number Diff line number Diff line #ifndef _ASM_ARM_PERF_REGS_H #define _ASM_ARM_PERF_REGS_H enum perf_event_arm_regs { PERF_REG_ARM_R0, PERF_REG_ARM_R1, PERF_REG_ARM_R2, PERF_REG_ARM_R3, PERF_REG_ARM_R4, PERF_REG_ARM_R5, PERF_REG_ARM_R6, PERF_REG_ARM_R7, PERF_REG_ARM_R8, PERF_REG_ARM_R9, PERF_REG_ARM_R10, PERF_REG_ARM_FP, PERF_REG_ARM_IP, PERF_REG_ARM_SP, PERF_REG_ARM_LR, PERF_REG_ARM_PC, PERF_REG_ARM_MAX, }; #endif /* _ASM_ARM_PERF_REGS_H */
arch/arm/kernel/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -78,6 +78,7 @@ obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_PERF_EVENTS) += perf_regs.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o Loading
arch/arm/kernel/perf_event.c +1 −2 Original line number Diff line number Diff line Loading @@ -256,12 +256,11 @@ validate_event(struct pmu_hw_events *hw_events, struct perf_event *event) { struct arm_pmu *armpmu = to_arm_pmu(event->pmu); struct pmu *leader_pmu = event->group_leader->pmu; if (is_software_event(event)) return 1; if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF) if (event->state < PERF_EVENT_STATE_OFF) return 1; if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec) Loading