drm/amd/display: Update panel register

[Why]
Incorrect panel register settings are
applied for power sequence because the
register macro is not defined in resource.

[How]
Implement same register space to future
resource files.

Signed-off-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>