Loading arch/x86/kernel/rtc.c +4 −9 Original line number Diff line number Diff line Loading @@ -196,14 +196,9 @@ int update_persistent_clock(struct timespec now) return set_rtc_mmss(now.tv_sec); } unsigned long long __vsyscall_fn native_read_tsc(void) unsigned long long native_read_tsc(void) { DECLARE_ARGS(val, low, high); rdtsc_barrier(); asm volatile("rdtsc" : EAX_EDX_RET(val, low, high)); rdtsc_barrier(); return EAX_EDX_VAL(val, low, high); return __native_read_tsc(); } EXPORT_SYMBOL_GPL(native_read_tsc); EXPORT_SYMBOL(native_read_tsc); include/asm-x86/msr.h +11 −0 Original line number Diff line number Diff line Loading @@ -93,6 +93,17 @@ static inline int native_write_msr_safe(unsigned int msr, extern unsigned long long native_read_tsc(void); static __always_inline unsigned long long __native_read_tsc(void) { DECLARE_ARGS(val, low, high); rdtsc_barrier(); asm volatile("rdtsc" : EAX_EDX_RET(val, low, high)); rdtsc_barrier(); return EAX_EDX_VAL(val, low, high); } static inline unsigned long long native_read_pmc(int counter) { DECLARE_ARGS(val, low, high); Loading include/asm-x86/tsc.h +1 −1 Original line number Diff line number Diff line Loading @@ -46,7 +46,7 @@ static inline cycles_t vget_cycles(void) if (!cpu_has_tsc) return 0; #endif return (cycles_t) native_read_tsc(); return (cycles_t) __native_read_tsc(); } extern void tsc_init(void); Loading Loading
arch/x86/kernel/rtc.c +4 −9 Original line number Diff line number Diff line Loading @@ -196,14 +196,9 @@ int update_persistent_clock(struct timespec now) return set_rtc_mmss(now.tv_sec); } unsigned long long __vsyscall_fn native_read_tsc(void) unsigned long long native_read_tsc(void) { DECLARE_ARGS(val, low, high); rdtsc_barrier(); asm volatile("rdtsc" : EAX_EDX_RET(val, low, high)); rdtsc_barrier(); return EAX_EDX_VAL(val, low, high); return __native_read_tsc(); } EXPORT_SYMBOL_GPL(native_read_tsc); EXPORT_SYMBOL(native_read_tsc);
include/asm-x86/msr.h +11 −0 Original line number Diff line number Diff line Loading @@ -93,6 +93,17 @@ static inline int native_write_msr_safe(unsigned int msr, extern unsigned long long native_read_tsc(void); static __always_inline unsigned long long __native_read_tsc(void) { DECLARE_ARGS(val, low, high); rdtsc_barrier(); asm volatile("rdtsc" : EAX_EDX_RET(val, low, high)); rdtsc_barrier(); return EAX_EDX_VAL(val, low, high); } static inline unsigned long long native_read_pmc(int counter) { DECLARE_ARGS(val, low, high); Loading
include/asm-x86/tsc.h +1 −1 Original line number Diff line number Diff line Loading @@ -46,7 +46,7 @@ static inline cycles_t vget_cycles(void) if (!cpu_has_tsc) return 0; #endif return (cycles_t) native_read_tsc(); return (cycles_t) __native_read_tsc(); } extern void tsc_init(void); Loading