Commit 946cf44a authored Apr 12, 2021 by Nicholas Piggin Committed by Michael Ellerman Apr 12, 2021

KVM: PPC: Book3S HV: Ensure MSR[ME] is always set in guest MSR



Rather than add the ME bit to the MSR at guest entry, make it clear
that the hypervisor does not allow the guest to clear the bit.

The ME set is kept in guest entry for now, but a future patch will
warn if it's not present.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Daniel Axtens <dja@axtens.net>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Acked-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210412014845.1517916-12-npiggin@gmail.com

parent da487a5d

arch/powerpc/kvm/book3s_hv_builtin.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -662,6 +662,9 @@ static void kvmppc_end_cede(struct kvm_vcpu *vcpu)

		void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
		{
		/* Guest must always run with ME enabled. */
		msr = msr \| MSR_ME;

		/*
		* Check for illegal transactional state bit combination
		* and if we find it, force the TS field to a safe state.

arch/powerpc/kvm/book3s_hv_nested.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -343,7 +343,9 @@ long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu)
		vcpu->arch.nested = l2;
		vcpu->arch.nested_vcpu_id = l2_hv.vcpu_token;
		vcpu->arch.regs = l2_regs;
		vcpu->arch.shregs.msr = vcpu->arch.regs.msr;

		/* Guest must always run with ME enabled. */
		vcpu->arch.shregs.msr = vcpu->arch.regs.msr \| MSR_ME;

		sanitise_hv_regs(vcpu, &l2_hv);
		restore_hv_regs(vcpu, &l2_hv);