Commit 9504a9f2 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

arm64: dts: renesas: Group tuples in pci ranges and dma-ranges properties



To improve human readability and enable automatic validation, the tuples
in the "ranges" and "dma-ranges" properties of PCI device nodes should
be grouped.

Fix this by grouping the tuples of the "ranges" and "dma-ranges"
properties using angle brackets.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-8-geert+renesas@glider.be


Reviewed-by: default avatarUlrich Hecht <uli+renesas@fpond.eu>
parent 0aab5b91
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+8 −8
Original line number Diff line number Diff line
@@ -2323,10 +2323,10 @@ pciec0: pcie@fe000000 {
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
				0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
				0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
				0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
@@ -2350,10 +2350,10 @@ pciec1: pcie@ee800000 {
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
				0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
				0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
				0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
				 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
				 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
				 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+8 −8
Original line number Diff line number Diff line
@@ -2192,10 +2192,10 @@ pciec0: pcie@fe000000 {
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
				  0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
				  0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
				  0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
@@ -2219,10 +2219,10 @@ pciec1: pcie@ee800000 {
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
				  0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
				  0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
				  0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
				 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
				 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
				 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+4 −4
Original line number Diff line number Diff line
@@ -1679,10 +1679,10 @@ pciec0: pcie@fe000000 {
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
				  0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
				  0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
				  0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+8 −8
Original line number Diff line number Diff line
@@ -2679,10 +2679,10 @@ pciec0: pcie@fe000000 {
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
				0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
				0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
				0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
@@ -2706,10 +2706,10 @@ pciec1: pcie@ee800000 {
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
				0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
				0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
				0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
				 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
				 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
				 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+8 −8
Original line number Diff line number Diff line
@@ -2462,10 +2462,10 @@ pciec0: pcie@fe000000 {
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
				0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
				0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
				0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
@@ -2489,10 +2489,10 @@ pciec1: pcie@ee800000 {
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
				0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
				0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
				0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
				 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
				 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
				 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
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