Commit 96313f1b authored by Jerry Zuo's avatar Jerry Zuo Committed by Alex Deucher
Browse files

drm/amd/display: Fix MST downstream display not light up regression 



The fix is for the scenario: MST+SST chain together, and hook up
to the card.

Regression: Per stream validate_context build v2
Before dc_add_stream_to_ctx(), need to update/reset
stream signal type to SIGNAL_TYPE_DISPLAY_PORT_MST. Otherwise,
downstream device cannot be added to ctx due to the lack of signal
type info (SIGNAL_TYPE_NONE).
update_stream_signal() needs to be done after stream is created.

Signed-off-by: default avatarJerry Zuo <Jerry.Zuo@amd.com>
Reviewed-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent aac6a07e

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+0 −25
Original line number Diff line number Diff line
@@ -1323,7 +1323,6 @@ bool dc_is_stream_unchanged( 


/* Maximum TMDS single link pixel clock 165MHz */

#define TMDS_MAX_PIXEL_CLOCK_IN_KHZ 165000

#define TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST 297000



static void update_stream_engine_usage(

		struct resource_context *res_ctx,
@@ -1434,28 +1433,6 @@ static struct audio *find_first_free_audio( 
	return 0;

}



static void update_stream_signal(struct dc_stream_state *stream)

{

	if (stream->output_signal == SIGNAL_TYPE_NONE) {

		struct dc_sink *dc_sink = stream->sink;



		if (dc_sink->sink_signal == SIGNAL_TYPE_NONE)

			stream->signal = stream->sink->link->connector_signal;

		else

			stream->signal = dc_sink->sink_signal;

	} else {

		stream->signal = stream->output_signal;

	}



	if (dc_is_dvi_signal(stream->signal)) {

		if (stream->timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST &&

			stream->sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)

			stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;

		else

			stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;

	}

}



bool resource_is_stream_unchanged(

	struct validate_context *old_context, struct dc_stream_state *stream)

{
@@ -1627,8 +1604,6 @@ static int get_norm_pix_clk(const struct dc_crtc_timing *timing) 


static void calculate_phy_pix_clks(struct dc_stream_state *stream)

{

	update_stream_signal(stream);



	/* update actual pixel clock on all streams */

	if (dc_is_hdmi_signal(stream->signal))

		stream->phy_pix_clk = get_norm_pix_clk(

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

+24 −0
Original line number Diff line number Diff line
@@ -33,6 +33,28 @@ 
/*******************************************************************************

 * Private functions

 ******************************************************************************/

#define TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST 297000

static void update_stream_signal(struct dc_stream_state *stream)

{

	if (stream->output_signal == SIGNAL_TYPE_NONE) {

		struct dc_sink *dc_sink = stream->sink;



		if (dc_sink->sink_signal == SIGNAL_TYPE_NONE)

			stream->signal = stream->sink->link->connector_signal;

		else

			stream->signal = dc_sink->sink_signal;

	} else {

		stream->signal = stream->output_signal;

	}



	if (dc_is_dvi_signal(stream->signal)) {

		if (stream->timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST &&

			stream->sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)

			stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;

		else

			stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;

	}

}



static bool construct(struct dc_stream_state *stream,

	struct dc_sink *dc_sink_data)
@@ -80,6 +102,8 @@ static bool construct(struct dc_stream_state *stream, 
	stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;



	stream->status.link = stream->sink->link;



	update_stream_signal(stream);

	return true;

}