Commit 96ce9227 authored by Bhupesh Sharma's avatar Bhupesh Sharma Committed by Bjorn Andersson
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arm64: dts: qcom: sm6115: Add remoteproc nodes 



Add the adsp, cdsp and modem remoteproc nodes to sm6115.

Signed-off-by: default avatarBhupesh Sharma <bhupesh.sharma@linaro.org>
[bjorn: Extended regs to match #address/size-cells to 2]
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230128054256.2100501-1-bhupesh.sharma@linaro.org
parent d97ba0b0

arch/arm64/boot/dts/qcom/sm6115.dtsi

+184 −0
Original line number Diff line number Diff line
@@ -1322,6 +1322,39 @@ dispcc: clock-controller@5f00000 { 
			#power-domain-cells = <1>;

		};



		remoteproc_mpss: remoteproc@6080000 {

			compatible = "qcom,sm6115-mpss-pas";

			reg = <0x0 0x06080000 0x0 0x100>;



			interrupts-extended = <&intc GIC_SPI 307 IRQ_TYPE_EDGE_RISING>,

					      <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,

					      <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,

					      <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,

					      <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,

					      <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "wdog", "fatal", "ready", "handover",

					  "stop-ack", "shutdown-ack";



			clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;

			clock-names = "xo";



			power-domains = <&rpmpd SM6115_VDDCX>;



			memory-region = <&pil_modem_mem>;



			qcom,smem-states = <&modem_smp2p_out 0>;

			qcom,smem-state-names = "stop";



			status = "disabled";



			glink-edge {

				interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;

				label = "mpss";

				qcom,remote-pid = <1>;

				mboxes = <&apcs_glb 12>;

			};

		};



		stm@8002000 {

			compatible = "arm,coresight-stm", "arm,primecell";

			reg = <0x0 0x08002000 0x0 0x1000>,
@@ -1934,6 +1967,157 @@ funnel_apss1_in: endpoint { 
			};

		};



		remoteproc_adsp: remoteproc@ab00000 {

			compatible = "qcom,sm6115-adsp-pas";

			reg = <0x0 0x0ab00000 0x0 0x100>;



			interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>,

					      <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,

					      <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,

					      <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,

					      <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "wdog", "fatal", "ready",

					  "handover", "stop-ack";



			clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;

			clock-names = "xo";



			power-domains = <&rpmpd SM6115_VDD_LPI_CX>,

					<&rpmpd SM6115_VDD_LPI_MX>;



			memory-region = <&pil_adsp_mem>;



			qcom,smem-states = <&adsp_smp2p_out 0>;

			qcom,smem-state-names = "stop";



			status = "disabled";



			glink-edge {

				interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;

				label = "lpass";

				qcom,remote-pid = <2>;

				mboxes = <&apcs_glb 8>;



				fastrpc {

					compatible = "qcom,fastrpc";

					qcom,glink-channels = "fastrpcglink-apps-dsp";

					label = "adsp";

					qcom,non-secure-domain;

					#address-cells = <1>;

					#size-cells = <0>;



					compute-cb@3 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <3>;

						iommus = <&apps_smmu 0x01c3 0x0>;

					};



					compute-cb@4 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <4>;

						iommus = <&apps_smmu 0x01c4 0x0>;

					};



					compute-cb@5 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <5>;

						iommus = <&apps_smmu 0x01c5 0x0>;

					};



					compute-cb@6 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <6>;

						iommus = <&apps_smmu 0x01c6 0x0>;

					};



					compute-cb@7 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <7>;

						iommus = <&apps_smmu 0x01c7 0x0>;

					};

				};

			};

		};



		remoteproc_cdsp: remoteproc@b300000 {

			compatible = "qcom,sm6115-cdsp-pas";

			reg = <0x0 0x0b300000 0x0 0x100000>;



			interrupts-extended = <&intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,

					      <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,

					      <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,

					      <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,

					      <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "wdog", "fatal", "ready",

					  "handover", "stop-ack";



			clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;

			clock-names = "xo";



			power-domains = <&rpmpd SM6115_VDDCX>;



			memory-region = <&pil_cdsp_mem>;



			qcom,smem-states = <&cdsp_smp2p_out 0>;

			qcom,smem-state-names = "stop";



			status = "disabled";



			glink-edge {

				interrupts = <GIC_SPI 261 IRQ_TYPE_EDGE_RISING>;

				label = "cdsp";

				qcom,remote-pid = <5>;

				mboxes = <&apcs_glb 28>;



				fastrpc {

					compatible = "qcom,fastrpc";

					qcom,glink-channels = "fastrpcglink-apps-dsp";

					label = "cdsp";

					qcom,non-secure-domain;

					#address-cells = <1>;

					#size-cells = <0>;



					compute-cb@1 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <1>;

						iommus = <&apps_smmu 0x0c01 0x0>;

					};



					compute-cb@2 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <2>;

						iommus = <&apps_smmu 0x0c02 0x0>;

					};



					compute-cb@3 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <3>;

						iommus = <&apps_smmu 0x0c03 0x0>;

					};



					compute-cb@4 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <4>;

						iommus = <&apps_smmu 0x0c04 0x0>;

					};



					compute-cb@5 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <5>;

						iommus = <&apps_smmu 0x0c05 0x0>;

					};



					compute-cb@6 {

						compatible = "qcom,fastrpc-compute-cb";

						reg = <6>;

						iommus = <&apps_smmu 0x0c06 0x0>;

					};



					/* note: secure cb9 in downstream */

				};

			};

		};



		apps_smmu: iommu@c600000 {

			compatible = "qcom,sm6115-smmu-500", "qcom,smmu-500", "arm,mmu-500";

			reg = <0x0 0x0c600000 0x0 0x80000>;