Commit 979813d2 authored Jun 10, 2022 by Claudiu Beznea

ARM: dts: at91: use generic name for reset controller



Use generic name for reset controller of AT91 devices to comply with
DT specifications.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220610092414.1816571-2-claudiu.beznea@microchip.com

parent b66724d2

arch/arm/boot/dts/at91sam9260.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -123,7 +123,7 @@ pmc: pmc@fffffc00 {
		clock-names = "slow_xtal", "main_xtal";
		};

		rstc@fffffd00 {
		reset-controller@fffffd00 {
		compatible = "atmel,at91sam9260-rstc";
		reg = <0xfffffd00 0x10>;
		clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;

arch/arm/boot/dts/at91sam9261.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -603,7 +603,7 @@ pmc: pmc@fffffc00 {
		clock-names = "slow_xtal", "main_xtal";
		};

		rstc@fffffd00 {
		reset-controller@fffffd00 {
		compatible = "atmel,at91sam9260-rstc";
		reg = <0xfffffd00 0x10>;
		clocks = <&slow_xtal>;

arch/arm/boot/dts/at91sam9263.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -151,7 +151,7 @@ tcb0: timer@fff7c000 {
		clock-names = "t0_clk", "slow_clk";
		};

		rstc@fffffd00 {
		reset-controller@fffffd00 {
		compatible = "atmel,at91sam9260-rstc";
		reg = <0xfffffd00 0x10>;
		clocks = <&slow_xtal>;

arch/arm/boot/dts/at91sam9g45.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -137,7 +137,7 @@ pmc: pmc@fffffc00 {
		clock-names = "slow_clk", "main_xtal";
		};

		rstc@fffffd00 {
		reset-controller@fffffd00 {
		compatible = "atmel,at91sam9g45-rstc";
		reg = <0xfffffd00 0x10>;
		clocks = <&clk32k>;

arch/arm/boot/dts/at91sam9n12.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -126,7 +126,7 @@ pmc: pmc@fffffc00 {
		interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
		};

		rstc@fffffe00 {
		reset-controller@fffffe00 {
		compatible = "atmel,at91sam9g45-rstc";
		reg = <0xfffffe00 0x10>;
		clocks = <&clk32k>;