Commit 97feeef5 authored by Mark's avatar Mark Committed by Greg Kroah-Hartman
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Staging: comedi: Cleanup adv_pci1710.c from checkpatch.pl 



This patch cleans up some issues discovered by checkpatch.pl

Signed-off-by: default avatarMark Rankilor <reodge@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 2312202c

drivers/staging/comedi/drivers/adv_pci1710.c

+28 −19
Original line number Diff line number Diff line
@@ -50,7 +50,9 @@ Configuration options: 
#include "8253.h"

#include "amcc_s5933.h"



#define PCI171x_PARANOIDCHECK	/* if defined, then is used code which control correct channel number on every 12 bit sample */

#define PCI171x_PARANOIDCHECK	/* if defined, then is used code which control

				 * correct channel number on every 12 bit

				 * sample */



#undef PCI171X_EXTDEBUG
@@ -91,13 +93,15 @@ Configuration options: 
#define PCI171x_CNT2	28	/* R/W: 8254 counter 2 */

#define PCI171x_CNTCTRL	30	/* W:   8254 counter control */



/* upper bits from status register (PCI171x_STATUS) (lower is same woth control reg) */

/* upper bits from status register (PCI171x_STATUS) (lower is same with control

 * reg) */

#define	Status_FE	0x0100	/* 1=FIFO is empty */

#define Status_FH	0x0200	/* 1=FIFO is half full */

#define Status_FF	0x0400	/* 1=FIFO is full, fatal error */

#define Status_IRQ	0x0800	/* 1=IRQ occured */

/* bits from control register (PCI171x_CONTROL) */

#define Control_CNT0	0x0040	/* 1=CNT0 have external source, 0=have internal 100kHz source */

#define Control_CNT0	0x0040	/* 1=CNT0 have external source,

				 * 0=have internal 100kHz source */

#define Control_ONEFH	0x0020	/* 1=IRQ on FIFO is half full, 0=every sample */

#define Control_IRQEN	0x0010	/* 1=enable IRQ */

#define Control_GATE	0x0008	/* 1=enable external trigger GATE (8254?) */
@@ -112,7 +116,8 @@ Configuration options: 
#define Counter_RW0     0x0010	/* RW0/RW1 select read/write mode */

#define Counter_RW1     0x0020

#define Counter_SC0     0x0040	/* Select Counter. Only 00 or 11 may */

#define Counter_SC1     0x0080	/* be used, 00 for CNT0, 11 for read-back command */

#define Counter_SC1     0x0080	/* be used, 00 for CNT0,

				 * 11 for read-back command */



#define PCI1720_DA0	 0	/* W:   D/A register 0 */

#define PCI1720_DA1	 2	/* W:   D/A register 1 */
@@ -138,8 +143,8 @@ static const struct comedi_lrange range_pci1710_3 = { 9, { 
							  }

};



static const char range_codes_pci1710_3[] =

    { 0x00, 0x01, 0x02, 0x03, 0x04, 0x10, 0x11, 0x12, 0x13 };

static const char range_codes_pci1710_3[] = { 0x00, 0x01, 0x02, 0x03, 0x04,

					      0x10, 0x11, 0x12, 0x13 };



static const struct comedi_lrange range_pci1710hg = { 12, {

							   BIP_RANGE(5),
@@ -157,10 +162,9 @@ static const struct comedi_lrange range_pci1710hg = { 12, { 
							   }

};



static const char range_codes_pci1710hg[] =

    { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x10, 0x11, 0x12,

	0x13

};

static const char range_codes_pci1710hg[] = { 0x00, 0x01, 0x02, 0x03, 0x04,

					      0x05, 0x06, 0x07, 0x10, 0x11,

					      0x12, 0x13 };



static const struct comedi_lrange range_pci17x1 = { 5, {

							BIP_RANGE(10),
@@ -301,7 +305,8 @@ struct pci1710_private { 
	unsigned int ai_timer1;	/*  timers */

	unsigned int ai_timer2;

	short ao_data[4];	/*  data output buffer */

	unsigned int cnt0_write_wait;	/*  after a write, wait for update of the internal state */

	unsigned int cnt0_write_wait;	/* after a write, wait for update of the

					 * internal state */

};



#define devpriv ((struct pci1710_private *)dev->private)
@@ -324,7 +329,9 @@ static int pci1710_reset(struct comedi_device *dev); 
static int pci171x_ai_cancel(struct comedi_device *dev,

			     struct comedi_subdevice *s);



static const unsigned int muxonechan[] = { 0x0000, 0x0101, 0x0202, 0x0303, 0x0404, 0x0505, 0x0606, 0x0707,	/*  used for gain list programming */

/*  used for gain list programming */

static const unsigned int muxonechan[] = {

	0x0000, 0x0101, 0x0202, 0x0303, 0x0404, 0x0505, 0x0606, 0x0707,

	0x0808, 0x0909, 0x0a0a, 0x0b0b, 0x0c0c, 0x0d0d, 0x0e0e, 0x0f0f,

	0x1010, 0x1111, 0x1212, 0x1313, 0x1414, 0x1515, 0x1616, 0x1717,

	0x1818, 0x1919, 0x1a1a, 0x1b1b, 0x1c1c, 0x1d1d, 0x1e1e, 0x1f1f
@@ -774,7 +781,8 @@ static void interrupt_pci1710_half_fifo(void *d) 
	}



	if (!devpriv->neverending_ai)

		if (devpriv->ai_act_scan >= devpriv->ai_scans) {	/* all data sampled */

		if (devpriv->ai_act_scan >= devpriv->ai_scans) { /* all data

								    sampled */

			pci171x_ai_cancel(dev, s);

			s->async->events |= COMEDI_CB_EOA;

			comedi_event(dev, s);
@@ -1559,7 +1567,8 @@ static int pci1710_attach(struct comedi_device *dev, 
		s->maxdata = 1;

		s->len_chanlist = this_board->n_dochan;

		s->range_table = &range_digital;

		s->io_bits = (1 << this_board->n_dochan) - 1;	/* all bits output */

		/* all bits output */

		s->io_bits = (1 << this_board->n_dochan) - 1;

		s->state = 0;

		s->insn_bits = pci171x_insn_bits_do;

		subdev++;