Commit 9abdf392 authored by Nikola Cornij's avatar Nikola Cornij Committed by Alex Deucher
Browse files

drm/amd/display: Add an option to limit max DSC target bpp per sink 



[Why] Can be used for debug purposes
[How] Add max target bpp override field and related handling

Signed-off-by: default avatarNikola Cornij <nikola.cornij@amd.com>
Acked-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 84c305b7

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+1 −0
Original line number Diff line number Diff line
@@ -4819,6 +4819,7 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector, 
			if (dc_dsc_compute_config(aconnector->dc_link->ctx->dc->res_pool->dscs[0],

						  &dsc_caps,

						  aconnector->dc_link->ctx->dc->debug.dsc_min_slice_height_override,

						  0,

						  link_bandwidth_kbps,

						  &stream->timing,

						  &stream->timing.dsc_cfg))

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

+3 −1
Original line number Diff line number Diff line
@@ -500,6 +500,7 @@ static void set_dsc_configs_from_fairness_vars(struct dsc_mst_fairness_params *p 
					&params[i].sink->dsc_caps.dsc_dec_caps,

					params[i].sink->ctx->dc->debug.dsc_min_slice_height_override,

					0,

					0,

					params[i].timing,

					&params[i].timing->dsc_cfg)) {

			params[i].timing->flags.DSC = 1;
@@ -530,6 +531,7 @@ static int bpp_x16_from_pbn(struct dsc_mst_fairness_params param, int pbn) 
			param.sink->ctx->dc->res_pool->dscs[0],

			&param.sink->dsc_caps.dsc_dec_caps,

			param.sink->ctx->dc->debug.dsc_min_slice_height_override,

			0,

			(int) kbps, param.timing, &dsc_config);



	return dsc_config.bits_per_pixel;
@@ -734,7 +736,7 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, 
		params[count].num_slices_v = aconnector->dsc_settings.dsc_num_slices_v;

		params[count].bpp_overwrite = aconnector->dsc_settings.dsc_bits_per_pixel;

		params[count].compression_possible = stream->sink->dsc_caps.dsc_dec_caps.is_dsc_supported;

		dc_dsc_get_policy_for_timing(params[count].timing, &dsc_policy);

		dc_dsc_get_policy_for_timing(params[count].timing, 0, &dsc_policy);

		if (!dc_dsc_compute_bandwidth_range(

				stream->sink->ctx->dc->res_pool->dscs[0],

				stream->sink->ctx->dc->debug.dsc_min_slice_height_override,

drivers/gpu/drm/amd/display/dc/dc_dsc.h

+6 −4
Original line number Diff line number Diff line
@@ -61,9 +61,9 @@ bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, 


bool dc_dsc_compute_bandwidth_range(

		const struct display_stream_compressor *dsc,

		const uint32_t dsc_min_slice_height_override,

		const uint32_t min_bpp,

		const uint32_t max_bpp,

		uint32_t dsc_min_slice_height_override,

		uint32_t min_bpp,

		uint32_t max_bpp,

		const struct dsc_dec_dpcd_caps *dsc_sink_caps,

		const struct dc_crtc_timing *timing,

		struct dc_dsc_bw_range *range);
@@ -71,12 +71,14 @@ bool dc_dsc_compute_bandwidth_range( 
bool dc_dsc_compute_config(

		const struct display_stream_compressor *dsc,

		const struct dsc_dec_dpcd_caps *dsc_sink_caps,

		const uint32_t dsc_min_slice_height_override,

		uint32_t dsc_min_slice_height_override,

		uint32_t max_target_bpp_limit_override,

		uint32_t target_bandwidth_kbps,

		const struct dc_crtc_timing *timing,

		struct dc_dsc_config *dsc_cfg);



void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,

		uint32_t max_target_bpp_limit_override,

		struct dc_dsc_policy *policy);



void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit);

drivers/gpu/drm/amd/display/dc/dc_types.h

+1 −0
Original line number Diff line number Diff line
@@ -234,6 +234,7 @@ struct dc_panel_patch { 
	unsigned int delay_ignore_msa;

	unsigned int disable_fec;

	unsigned int extra_t3_ms;

	unsigned int max_dsc_target_bpp_limit;

};



struct dc_edid_caps {

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

+16 −8
Original line number Diff line number Diff line
@@ -545,6 +545,7 @@ static bool setup_dsc_config( 
		int target_bandwidth_kbps,

		const struct dc_crtc_timing *timing,

		int min_slice_height_override,

		int max_dsc_target_bpp_limit_override,

		struct dc_dsc_config *dsc_cfg)

{

	struct dsc_enc_caps dsc_common_caps;
@@ -563,7 +564,7 @@ static bool setup_dsc_config( 


	memset(dsc_cfg, 0, sizeof(struct dc_dsc_config));



	dc_dsc_get_policy_for_timing(timing, &policy);

	dc_dsc_get_policy_for_timing(timing, max_dsc_target_bpp_limit_override, &policy);

	pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right;

	pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom;
@@ -863,9 +864,9 @@ bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, const uint8_t *dpcd_dsc_basic_da 
 */

bool dc_dsc_compute_bandwidth_range(

		const struct display_stream_compressor *dsc,

		const uint32_t dsc_min_slice_height_override,

		const uint32_t min_bpp,

		const uint32_t max_bpp,

		uint32_t dsc_min_slice_height_override,

		uint32_t min_bpp,

		uint32_t max_bpp,

		const struct dsc_dec_dpcd_caps *dsc_sink_caps,

		const struct dc_crtc_timing *timing,

		struct dc_dsc_bw_range *range)
@@ -882,7 +883,7 @@ bool dc_dsc_compute_bandwidth_range( 


	if (is_dsc_possible)

		is_dsc_possible = setup_dsc_config(dsc_sink_caps, &dsc_enc_caps, 0, timing,

				dsc_min_slice_height_override, &config);

				dsc_min_slice_height_override, max_bpp, &config);



	if (is_dsc_possible)

		get_dsc_bandwidth_range(min_bpp, max_bpp, &dsc_common_caps, timing, range);
@@ -893,7 +894,8 @@ bool dc_dsc_compute_bandwidth_range( 
bool dc_dsc_compute_config(

		const struct display_stream_compressor *dsc,

		const struct dsc_dec_dpcd_caps *dsc_sink_caps,

		const uint32_t dsc_min_slice_height_override,

		uint32_t dsc_min_slice_height_override,

		uint32_t max_target_bpp_limit_override,

		uint32_t target_bandwidth_kbps,

		const struct dc_crtc_timing *timing,

		struct dc_dsc_config *dsc_cfg)
@@ -905,11 +907,12 @@ bool dc_dsc_compute_config( 
	is_dsc_possible = setup_dsc_config(dsc_sink_caps,

			&dsc_enc_caps,

			target_bandwidth_kbps,

			timing, dsc_min_slice_height_override, dsc_cfg);

			timing, dsc_min_slice_height_override,

			max_target_bpp_limit_override, dsc_cfg);

	return is_dsc_possible;

}



void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, struct dc_dsc_policy *policy)

void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, uint32_t max_target_bpp_limit_override, struct dc_dsc_policy *policy)

{

	uint32_t bpc = 0;
@@ -963,10 +966,15 @@ void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, struct dc 
	default:

		return;

	}



	/* internal upper limit, default 16 bpp */

	if (policy->max_target_bpp > dsc_policy_max_target_bpp_limit)

		policy->max_target_bpp = dsc_policy_max_target_bpp_limit;



	/* apply override */

	if (max_target_bpp_limit_override && policy->max_target_bpp > max_target_bpp_limit_override)

		policy->max_target_bpp = max_target_bpp_limit_override;



	/* enable DSC when not needed, default false */

	if (dsc_policy_enable_dsc_when_not_needed)

		policy->enable_dsc_when_not_needed = dsc_policy_enable_dsc_when_not_needed;