Commit 9b8c6da0 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Vignesh Raghavendra
Browse files

arm64: dts: ti: add missing cache properties 



As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:

  k3-am6528-iot2050-basic-pg2.dtb: l3-cache0: 'cache-unified' is a required property

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: default avatarNishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230421223143.115099-1-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
parent ffc449e0

arch/arm64/boot/dts/ti/k3-am654.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -113,6 +113,7 @@ L2_1: l2-cache1 { 
	msmc_l3: l3-cache0 {

		compatible = "cache";

		cache-level = <3>;

		cache-unified;

	};



	thermal_zones: thermal-zones {

arch/arm64/boot/dts/ti/k3-j7200.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -95,6 +95,7 @@ L2_0: l2-cache0 { 
	msmc_l3: l3-cache0 {

		compatible = "cache";

		cache-level = <3>;

		cache-unified;

	};



	firmware {

arch/arm64/boot/dts/ti/k3-j721e.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -97,6 +97,7 @@ L2_0: l2-cache0 { 
	msmc_l3: l3-cache0 {

		compatible = "cache";

		cache-level = <3>;

		cache-unified;

	};



	firmware {

arch/arm64/boot/dts/ti/k3-j721s2.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -81,6 +81,7 @@ L2_0: l2-cache0 { 
	msmc_l3: l3-cache0 {

		compatible = "cache";

		cache-level = <3>;

		cache-unified;

	};



	firmware {