Commit 9bd5386c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'irq-urgent-2023-05-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq fixes from Thomas Gleixner:
 "A set of fixes for interrupt chip drivers:

   - Prevent loss of state in the MIPS GIC interrupt controller

   - Disable pseudo NMIs on Mediatek based Chromebooks as they have
     firmware issues which cause instantenous chrashes and freezes wen
     pseudo NMIs are used

   - Fix the error handling path in the MBIGEN driver and a defined but
     not used warning in the meson-gpio interrupt chip driver"

* tag 'irq-urgent-2023-05-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/mbigen: Unify the error handling in mbigen_of_create_domain()
  irqchip/meson-gpio: Mark OF related data as maybe unused
  irqchip/mips-gic: Use raw spinlock for gic_lock
  irqchip/mips-gic: Don't touch vl_map if a local interrupt is not routable
  irqchip/gic-v3: Disable pseudo NMIs on Mediatek devices w/ firmware issues
  dt-bindings: interrupt-controller: arm,gic-v3: Add quirk for Mediatek SoCs w/ broken FW
parents 045049cb 4115af49
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+6 −0
Original line number Diff line number Diff line
@@ -166,6 +166,12 @@ properties:
  resets:
    maxItems: 1

  mediatek,broken-save-restore-fw:
    type: boolean
    description:
      Asserts that the firmware on this device has issues saving and restoring
      GICR registers when the GIC redistributors are powered off.

dependencies:
  mbi-ranges: [ msi-controller ]
  msi-controller: [ mbi-ranges ]
+6 −2
Original line number Diff line number Diff line
@@ -16,7 +16,11 @@ void gic_enable_of_quirks(const struct device_node *np,
			  const struct gic_quirk *quirks, void *data)
{
	for (; quirks->desc; quirks++) {
		if (!of_device_is_compatible(np, quirks->compatible))
		if (quirks->compatible &&
		    !of_device_is_compatible(np, quirks->compatible))
			continue;
		if (quirks->property &&
		    !of_property_read_bool(np, quirks->property))
			continue;
		if (quirks->init(data))
			pr_info("GIC: enabling workaround for %s\n",
@@ -28,7 +32,7 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
		void *data)
{
	for (; quirks->desc; quirks++) {
		if (quirks->compatible)
		if (quirks->compatible || quirks->property)
			continue;
		if (quirks->iidr != (quirks->mask & iidr))
			continue;
+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@
struct gic_quirk {
	const char *desc;
	const char *compatible;
	const char *property;
	bool (*init)(void *data);
	u32 iidr;
	u32 mask;
+20 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@

#define FLAGS_WORKAROUND_GICR_WAKER_MSM8996	(1ULL << 0)
#define FLAGS_WORKAROUND_CAVIUM_ERRATUM_38539	(1ULL << 1)
#define FLAGS_WORKAROUND_MTK_GICR_SAVE		(1ULL << 2)

#define GIC_IRQ_TYPE_PARTITION	(GIC_IRQ_TYPE_LPI + 1)

@@ -1720,6 +1721,15 @@ static bool gic_enable_quirk_msm8996(void *data)
	return true;
}

static bool gic_enable_quirk_mtk_gicr(void *data)
{
	struct gic_chip_data *d = data;

	d->flags |= FLAGS_WORKAROUND_MTK_GICR_SAVE;

	return true;
}

static bool gic_enable_quirk_cavium_38539(void *data)
{
	struct gic_chip_data *d = data;
@@ -1792,6 +1802,11 @@ static const struct gic_quirk gic_quirks[] = {
		.compatible = "qcom,msm8996-gic-v3",
		.init	= gic_enable_quirk_msm8996,
	},
	{
		.desc	= "GICv3: Mediatek Chromebook GICR save problem",
		.property = "mediatek,broken-save-restore-fw",
		.init	= gic_enable_quirk_mtk_gicr,
	},
	{
		.desc	= "GICv3: HIP06 erratum 161010803",
		.iidr	= 0x0204043b,
@@ -1834,6 +1849,11 @@ static void gic_enable_nmi_support(void)
	if (!gic_prio_masking_enabled())
		return;

	if (gic_data.flags & FLAGS_WORKAROUND_MTK_GICR_SAVE) {
		pr_warn("Skipping NMI enable due to firmware issues\n");
		return;
	}

	ppi_nmi_refs = kcalloc(gic_data.ppi_nr, sizeof(*ppi_nmi_refs), GFP_KERNEL);
	if (!ppi_nmi_refs)
		return;
+18 −13
Original line number Diff line number Diff line
@@ -240,26 +240,27 @@ static int mbigen_of_create_domain(struct platform_device *pdev,
	struct irq_domain *domain;
	struct device_node *np;
	u32 num_pins;
	int ret = 0;

	parent = bus_get_dev_root(&platform_bus_type);
	if (!parent)
		return -ENODEV;

	for_each_child_of_node(pdev->dev.of_node, np) {
		if (!of_property_read_bool(np, "interrupt-controller"))
			continue;

		parent = bus_get_dev_root(&platform_bus_type);
		if (parent) {
		child = of_platform_device_create(np, NULL, parent);
			put_device(parent);
		if (!child) {
				of_node_put(np);
				return -ENOMEM;
			}
			ret = -ENOMEM;
			break;
		}

		if (of_property_read_u32(child->dev.of_node, "num-pins",
					 &num_pins) < 0) {
			dev_err(&pdev->dev, "No num-pins property\n");
			of_node_put(np);
			return -EINVAL;
			ret = -EINVAL;
			break;
		}

		domain = platform_msi_create_device_domain(&child->dev, num_pins,
@@ -267,12 +268,16 @@ static int mbigen_of_create_domain(struct platform_device *pdev,
							   &mbigen_domain_ops,
							   mgn_chip);
		if (!domain) {
			of_node_put(np);
			return -ENOMEM;
			ret = -ENOMEM;
			break;
		}
	}

	return 0;
	put_device(parent);
	if (ret)
		of_node_put(np);

	return ret;
}

#ifdef CONFIG_ACPI
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