Loading drivers/gpu/drm/radeon/cik.c +10 −0 Original line number Original line Diff line number Diff line Loading @@ -3676,6 +3676,16 @@ int cik_irq_process(struct radeon_device *rdev) break; break; } } break; break; case 146: case 147: dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR)); dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS)); /* reset addr and status */ WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); break; case 176: /* GFX RB CP_INT */ case 176: /* GFX RB CP_INT */ case 177: /* GFX IB CP_INT */ case 177: /* GFX IB CP_INT */ radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); Loading drivers/gpu/drm/radeon/cikd.h +4 −0 Original line number Original line Diff line number Diff line Loading @@ -95,6 +95,10 @@ #define VM_INVALIDATE_REQUEST 0x1478 #define VM_INVALIDATE_REQUEST 0x1478 #define VM_INVALIDATE_RESPONSE 0x147c #define VM_INVALIDATE_RESPONSE 0x147c #define VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x14DC #define VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x14FC #define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR 0x1518 #define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR 0x1518 #define VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR 0x151c #define VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR 0x151c Loading Loading
drivers/gpu/drm/radeon/cik.c +10 −0 Original line number Original line Diff line number Diff line Loading @@ -3676,6 +3676,16 @@ int cik_irq_process(struct radeon_device *rdev) break; break; } } break; break; case 146: case 147: dev_err(rdev->dev, "GPU fault detected: %d 0x%08x\n", src_id, src_data); dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n", RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR)); dev_err(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n", RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS)); /* reset addr and status */ WREG32_P(VM_CONTEXT1_CNTL2, 1, ~1); break; case 176: /* GFX RB CP_INT */ case 176: /* GFX RB CP_INT */ case 177: /* GFX IB CP_INT */ case 177: /* GFX IB CP_INT */ radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); radeon_fence_process(rdev, RADEON_RING_TYPE_GFX_INDEX); Loading
drivers/gpu/drm/radeon/cikd.h +4 −0 Original line number Original line Diff line number Diff line Loading @@ -95,6 +95,10 @@ #define VM_INVALIDATE_REQUEST 0x1478 #define VM_INVALIDATE_REQUEST 0x1478 #define VM_INVALIDATE_RESPONSE 0x147c #define VM_INVALIDATE_RESPONSE 0x147c #define VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x14DC #define VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x14FC #define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR 0x1518 #define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR 0x1518 #define VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR 0x151c #define VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR 0x151c Loading