Commit 9e1343ed authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'v6.1-rockchip-clock1' of... 

Merge tag 'v6.1-rockchip-clock1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull Rockchip clk driver updates from Heiko Stuebner:

 - mux-variant clock using the table variant to select parents
 - clock controller for the rv1126 soc
 - conversion of rk3128 to yaml and relicensing of the yaml bindings
   to gpl2+MIT (following dt-binding guildelines)

* tag 'v6.1-rockchip-clock1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: clock: rockchip: change SPDX-License-Identifier
  dt-bindings: clock: convert rockchip,rk3128-cru.txt to YAML
  clk: rockchip: Add clock controller support for RV1126 SoC
  dt-bindings: clock: rockchip: Document RV1126 CRU
  clk: rockchip: Add dt-binding header for RV1126
  clk: rockchip: Add MUXTBL variant
parents 1c23f9e6 fffa0fa4

Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml

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# SPDX-License-Identifier: GPL-2.0

# SPDX-License-Identifier: (GPL-2.0+ OR MIT)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/rockchip,px30-cru.yaml#

Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml

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# SPDX-License-Identifier: GPL-2.0

# SPDX-License-Identifier: (GPL-2.0+ OR MIT)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/rockchip,rk3036-cru.yaml#

Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt

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* Rockchip RK3126/RK3128 Clock and Reset Unit



The RK3126/RK3128 clock controller generates and supplies clock to various

controllers within the SoC and also implements a reset controller for SoC

peripherals.



Required Properties:



- compatible: should be "rockchip,rk3126-cru" or "rockchip,rk3128-cru"

  "rockchip,rk3126-cru" - controller compatible with RK3126 SoC.

  "rockchip,rk3128-cru" - controller compatible with RK3128 SoC.

- reg: physical base address of the controller and length of memory mapped

  region.

- #clock-cells: should be 1.

- #reset-cells: should be 1.



Optional Properties:



- rockchip,grf: phandle to the syscon managing the "general register files"

  If missing pll rates are not changeable, due to the missing pll lock status.



Each clock is assigned an identifier and client nodes can use this identifier

to specify the clock which they consume. All available clocks are defined as

preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be

used in device tree sources. Similar macros exist for the reset sources in

these files.



External clocks:



There are several clocks that are generated outside the SoC. It is expected

that they are defined using standard clock bindings with following

clock-output-names:

 - "xin24m" - crystal input - required,

 - "ext_i2s" - external I2S clock - optional,

 - "gmac_clkin" - external GMAC clock - optional



Example: Clock controller node:



	cru: cru@20000000 {

		compatible = "rockchip,rk3128-cru";

		reg = <0x20000000 0x1000>;

		rockchip,grf = <&grf>;



		#clock-cells = <1>;

		#reset-cells = <1>;

	};



Example: UART controller node that consumes the clock generated by the clock

  controller:



	uart2: serial@20068000 {

		compatible = "rockchip,serial";

		reg = <0x20068000 0x100>;

		interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <24000000>;

		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;

		clock-names = "sclk_uart", "pclk_uart";

	};

Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml

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# SPDX-License-Identifier: (GPL-2.0+ OR MIT)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/rockchip,rk3128-cru.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Rockchip RK3126/RK3128 Clock and Reset Unit (CRU)



maintainers:

  - Elaine Zhang <zhangqing@rock-chips.com>

  - Heiko Stuebner <heiko@sntech.de>



description: |

  The RK3126/RK3128 clock controller generates and supplies clock to various

  controllers within the SoC and also implements a reset controller for SoC

  peripherals.

  Each clock is assigned an identifier and client nodes can use this identifier

  to specify the clock which they consume. All available clocks are defined as

  preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be

  used in device tree sources. Similar macros exist for the reset sources in

  these files.



properties:

  compatible:

    enum:

      - rockchip,rk3126-cru

      - rockchip,rk3128-cru



  reg:

    maxItems: 1



  "#clock-cells":

    const: 1



  "#reset-cells":

    const: 1



  clocks:

    minItems: 1

    maxItems: 3



  clock-names:

    minItems: 1

    items:

      - const: xin24m

      - enum:

          - ext_i2s

          - gmac_clkin

      - enum:

          - ext_i2s

          - gmac_clkin



  rockchip,grf:

    $ref: /schemas/types.yaml#/definitions/phandle

    description:

      Phandle to the syscon managing the "general register files" (GRF),

      if missing pll rates are not changeable, due to the missing pll

      lock status.



required:

  - compatible

  - reg

  - "#clock-cells"

  - "#reset-cells"



additionalProperties: false



examples:

  - |

    cru: clock-controller@20000000 {

      compatible = "rockchip,rk3128-cru";

      reg = <0x20000000 0x1000>;

      rockchip,grf = <&grf>;

      #clock-cells = <1>;

      #reset-cells = <1>;

    };

Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml

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# SPDX-License-Identifier: GPL-2.0

# SPDX-License-Identifier: (GPL-2.0+ OR MIT)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/rockchip,rk3228-cru.yaml#