Commit 9e986666 authored by Lyude Paul's avatar Lyude Paul
Browse files

drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay() 



So that we can start using drm_dbg_*() in
drm_dp_link_train_clock_recovery_delay().

Signed-off-by: default avatarLyude Paul <lyude@redhat.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210423184309.207645-6-lyude@redhat.com


Reviewed-by: default avatarDave Airlie <airlied@redhat.com>
parent 3f3a6524

drivers/gpu/drm/amd/amdgpu/atombios_dp.c

+1 −1
Original line number Diff line number Diff line
@@ -612,7 +612,7 @@ amdgpu_atombios_dp_link_train_cr(struct amdgpu_atombios_dp_link_train_info *dp_i 
	dp_info->tries = 0;

	voltage = 0xff;

	while (1) {

		drm_dp_link_train_clock_recovery_delay(dp_info->dpcd);

		drm_dp_link_train_clock_recovery_delay(dp_info->aux, dp_info->dpcd);



		if (drm_dp_dpcd_read_link_status(dp_info->aux,

						 dp_info->link_status) <= 0) {

drivers/gpu/drm/drm_dp_helper.c

+2 −1
Original line number Diff line number Diff line
@@ -132,7 +132,8 @@ u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZ 
}

EXPORT_SYMBOL(drm_dp_get_adjust_request_post_cursor);



void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])

void drm_dp_link_train_clock_recovery_delay(const struct drm_dp_aux *aux,

					    const u8 dpcd[DP_RECEIVER_CAP_SIZE])

{

	unsigned long rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &

					 DP_TRAINING_AUX_RD_MASK;

drivers/gpu/drm/i915/display/intel_dp_link_training.c

+1 −1
Original line number Diff line number Diff line
@@ -513,7 +513,7 @@ static void intel_dp_link_training_clock_recovery_delay(struct intel_dp *intel_d 
							enum drm_dp_phy dp_phy)

{

	if (dp_phy == DP_PHY_DPRX)

		drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd);

		drm_dp_link_train_clock_recovery_delay(&intel_dp->aux, intel_dp->dpcd);

	else

		drm_dp_lttpr_link_train_clock_recovery_delay();

}

drivers/gpu/drm/msm/dp/dp_ctrl.c

+1 −1
Original line number Diff line number Diff line
@@ -1103,7 +1103,7 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl, 
	tries = 0;

	old_v_level = ctrl->link->phy_params.v_level;

	for (tries = 0; tries < maximum_retries; tries++) {

		drm_dp_link_train_clock_recovery_delay(ctrl->panel->dpcd);

		drm_dp_link_train_clock_recovery_delay(ctrl->aux, ctrl->panel->dpcd);



		ret = dp_ctrl_read_link_status(ctrl, link_status);

		if (ret)

drivers/gpu/drm/msm/edp/edp_ctrl.c

+1 −1
Original line number Diff line number Diff line
@@ -608,7 +608,7 @@ static int edp_start_link_train_1(struct edp_ctrl *ctrl) 
	tries = 0;

	old_v_level = ctrl->v_level;

	while (1) {

		drm_dp_link_train_clock_recovery_delay(ctrl->dpcd);

		drm_dp_link_train_clock_recovery_delay(ctrl->drm_aux, ctrl->dpcd);



		rlen = drm_dp_dpcd_read_link_status(ctrl->drm_aux, link_status);

		if (rlen < DP_LINK_STATUS_SIZE) {