Commit a1697d11 authored by Amit Cohen's avatar Amit Cohen Committed by Paolo Abeni
Browse files

mlxsw: Add an indication of SMPE index validity for PGT table 



In Spectrum-1, the index into the MPE table - called switch multicast to
port egress VID (SMPE) - is derived from the PGT entry, whereas in
Spectrum-2 and later ASICs it is derived from the FID.

Therefore, in Spectrum-1, the SMPE index needs to be programmed as part of
the PGT entry via SMID register, while it is reserved for Spectrum-2 and
later ASICs.

Add 'pgt_smpe_index_valid' boolean as part of 'struct mlxsw_sp' and set
it to true for Spectrum-1 and to false for the later ASICs. Add
'smpe_index_valid' as part of 'struct mlxsw_sp_pgt' and set it according
to the value in 'struct mlxsw_sp' as part of PGT initialization.

Signed-off-by: default avatarAmit Cohen <amcohen@nvidia.com>
Reviewed-by: default avatarPetr Machata <petrm@nvidia.com>
Signed-off-by: default avatarIdo Schimmel <idosch@nvidia.com>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent d8782ec5

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+4 −0
Original line number Diff line number Diff line
@@ -3235,6 +3235,7 @@ static int mlxsw_sp1_init(struct mlxsw_core *mlxsw_core, 
	mlxsw_sp->listeners_count = ARRAY_SIZE(mlxsw_sp1_listener);

	mlxsw_sp->fid_family_arr = mlxsw_sp1_fid_family_arr;

	mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP1;

	mlxsw_sp->pgt_smpe_index_valid = true;



	return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);

}
@@ -3268,6 +3269,7 @@ static int mlxsw_sp2_init(struct mlxsw_core *mlxsw_core, 
	mlxsw_sp->listeners_count = ARRAY_SIZE(mlxsw_sp2_listener);

	mlxsw_sp->fid_family_arr = mlxsw_sp2_fid_family_arr;

	mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP2;

	mlxsw_sp->pgt_smpe_index_valid = false;



	return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);

}
@@ -3301,6 +3303,7 @@ static int mlxsw_sp3_init(struct mlxsw_core *mlxsw_core, 
	mlxsw_sp->listeners_count = ARRAY_SIZE(mlxsw_sp2_listener);

	mlxsw_sp->fid_family_arr = mlxsw_sp2_fid_family_arr;

	mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP3;

	mlxsw_sp->pgt_smpe_index_valid = false;



	return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);

}
@@ -3334,6 +3337,7 @@ static int mlxsw_sp4_init(struct mlxsw_core *mlxsw_core, 
	mlxsw_sp->listeners_count = ARRAY_SIZE(mlxsw_sp2_listener);

	mlxsw_sp->fid_family_arr = mlxsw_sp2_fid_family_arr;

	mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP4;

	mlxsw_sp->pgt_smpe_index_valid = false;



	return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);

}

drivers/net/ethernet/mellanox/mlxsw/spectrum.h

+1 −0
Original line number Diff line number Diff line
@@ -219,6 +219,7 @@ struct mlxsw_sp { 
	struct mutex ipv6_addr_ht_lock; /* Protects ipv6_addr_ht */

	bool ubridge;

	struct mlxsw_sp_pgt *pgt;

	bool pgt_smpe_index_valid;

};



struct mlxsw_sp_ptp_ops {

drivers/net/ethernet/mellanox/mlxsw/spectrum_pgt.c

+2 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ struct mlxsw_sp_pgt { 
	struct idr pgt_idr;

	u16 end_index; /* Exclusive. */

	struct mutex lock; /* Protects PGT. */

	bool smpe_index_valid;

};



int mlxsw_sp_pgt_mid_alloc(struct mlxsw_sp *mlxsw_sp, u16 *p_mid)
@@ -107,6 +108,7 @@ int mlxsw_sp_pgt_init(struct mlxsw_sp *mlxsw_sp) 
	idr_init(&pgt->pgt_idr);

	pgt->end_index = MLXSW_CORE_RES_GET(mlxsw_sp->core, PGT_SIZE);

	mutex_init(&pgt->lock);

	pgt->smpe_index_valid = mlxsw_sp->pgt_smpe_index_valid;

	mlxsw_sp->pgt = pgt;

	return 0;

}