Commit a30e78bd authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Andy Gross
Browse files

ARM: dts: apq8064: move pinctrls to dedicated dtsi 



As there are more pinctrls to come, moving these to dedicated dtsi makes
more sense.

Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: default avatarAndy Gross <andy.gross@linaro.org>
parent e07214db

arch/arm/boot/dts/qcom-apq8064-pins.dtsi

0 → 100644
+58 −0
Original line number Original line Diff line number Diff line 


&tlmm_pinmux {

	sdc4_gpios: sdc4-gpios {

		pios {

			pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";

			function = "sdc4";

		};

	};



	ps_hold: ps_hold {

		mux {

			pins = "gpio78";

			function = "ps_hold";

		};

	};



	i2c1_pins: i2c1 {

		mux {

			pins = "gpio20", "gpio21";

			function = "gsbi1";

		};

	};



	i2c3_pins: i2c3 {

		mux {

			pins = "gpio8", "gpio9";

			function = "gsbi3";

		};

	};



	gsbi6_uart_2pins: gsbi6_uart_2pins {

		mux {

			pins = "gpio14", "gpio15";

			function = "gsbi6";

		};

	};



	gsbi6_uart_4pins: gsbi6_uart_4pins {

		mux {

			pins = "gpio14", "gpio15", "gpio16", "gpio17";

			function = "gsbi6";

		};

	};



	gsbi7_uart_2pins: gsbi7_uart_2pins {

		mux {

			pins = "gpio82", "gpio83";

			function = "gsbi7";

		};

	};



	gsbi7_uart_4pins: gsbi7_uart_4pins {

		mux {

			pins = "gpio82", "gpio83", "gpio84", "gpio85";

			function = "gsbi7";

		};

	};

};

arch/arm/boot/dts/qcom-apq8064.dtsi

+1 −56
Original line number Original line Diff line number Diff line
@@ -142,62 +142,6 @@ tlmm_pinmux: pinctrl@800000 { 




			pinctrl-names = "default";

			pinctrl-names = "default";

			pinctrl-0 = <&ps_hold>;

			pinctrl-0 = <&ps_hold>;



			sdc4_gpios: sdc4-gpios {

				pios {

					pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";

					function = "sdc4";

				};

			};



			ps_hold: ps_hold {

				mux {

					pins = "gpio78";

					function = "ps_hold";

				};

			};



			i2c1_pins: i2c1 {

				mux {

					pins = "gpio20", "gpio21";

					function = "gsbi1";

				};

			};



			i2c3_pins: i2c3 {

				mux {

					pins = "gpio8", "gpio9";

					function = "gsbi3";

				};

			};



			gsbi6_uart_2pins: gsbi6_uart_2pins {

				mux {

					pins = "gpio14", "gpio15";

					function = "gsbi6";

				};

			};



			gsbi6_uart_4pins: gsbi6_uart_4pins {

				mux {

					pins = "gpio14", "gpio15", "gpio16", "gpio17";

					function = "gsbi6";

				};

			};



			gsbi7_uart_2pins: gsbi7_uart_2pins {

				mux {

					pins = "gpio82", "gpio83";

					function = "gsbi7";

				};

			};



			gsbi7_uart_4pins: gsbi7_uart_4pins {

				mux {

					pins = "gpio82", "gpio83", "gpio84", "gpio85";

					function = "gsbi7";

				};

			};

		};

		};





		sfpb_wrapper_mutex: syscon@1200000 {

		sfpb_wrapper_mutex: syscon@1200000 {
@@ -830,3 +774,4 @@ pcie: pci@1b500000 { 
		};

		};

	};

	};

};

};

#include "qcom-apq8064-pins.dtsi"