Commit a34ebb17 authored by Robert Marko's avatar Robert Marko Committed by Krzysztof Kozlowski
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arm64: dts: microchip: sparx5: correct CPU address-cells 



There is no reason for CPU node #address-cells to be set at 2, so lets
change them to 1 and update the reg property accordingly.

Signed-off-by: default avatarRobert Marko <robert.marko@sartura.hr>
Link: https://lore.kernel.org/r/20230221105039.316819-2-robert.marko@sartura.hr


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 70be8370

arch/arm64/boot/dts/microchip/sparx5.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -24,7 +24,7 @@ chosen { 
	};



	cpus {

		#address-cells = <2>;

		#address-cells = <1>;

		#size-cells = <0>;

		cpu-map {

			cluster0 {
@@ -39,14 +39,14 @@ core1 { 
		cpu0: cpu@0 {

			compatible = "arm,cortex-a53";

			device_type = "cpu";

			reg = <0x0 0x0>;

			reg = <0x0>;

			enable-method = "psci";

			next-level-cache = <&L2_0>;

		};

		cpu1: cpu@1 {

			compatible = "arm,cortex-a53";

			device_type = "cpu";

			reg = <0x0 0x1>;

			reg = <0x1>;

			enable-method = "psci";

			next-level-cache = <&L2_0>;

		};