Commit a364517b authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville
Browse files

ath9k_hw: remove redundant arguments to INIT_INI_ARRAY 



The row/column sizes can be derived from the array argument within the macro
itself, which is less error prone. In a few cases the supplied column size
was actually wrong.

Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent b05a0111

drivers/net/wireless/ath/ath9k/ar9002_hw.c

+52 −107
Original line number Diff line number Diff line
@@ -26,106 +26,74 @@ 
static void ar9002_hw_init_mode_regs(struct ath_hw *ah)

{

	if (AR_SREV_9271(ah)) {

		INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,

			       ARRAY_SIZE(ar9271Modes_9271), 5);

		INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,

			       ARRAY_SIZE(ar9271Common_9271), 2);

		INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,

			       ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 5);

		INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);

		INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);

		INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);

		return;

	}



	if (ah->config.pcie_clock_req)

		INIT_INI_ARRAY(&ah->iniPcieSerdes,

			   ar9280PciePhy_clkreq_off_L1_9280,

			   ARRAY_SIZE(ar9280PciePhy_clkreq_off_L1_9280), 2);

			   ar9280PciePhy_clkreq_off_L1_9280);

	else

		INIT_INI_ARRAY(&ah->iniPcieSerdes,

			   ar9280PciePhy_clkreq_always_on_L1_9280,

			   ARRAY_SIZE(ar9280PciePhy_clkreq_always_on_L1_9280), 2);

			   ar9280PciePhy_clkreq_always_on_L1_9280);

#ifdef CONFIG_PM_SLEEP

		INIT_INI_ARRAY(&ah->iniPcieSerdesWow,

			       ar9280PciePhy_awow,

			       ARRAY_SIZE(ar9280PciePhy_awow), 2);

			       ar9280PciePhy_awow);

#endif



	if (AR_SREV_9287_11_OR_LATER(ah)) {

		INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1,

				ARRAY_SIZE(ar9287Modes_9287_1_1), 5);

		INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1,

				ARRAY_SIZE(ar9287Common_9287_1_1), 2);

		INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1);

		INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1);

	} else if (AR_SREV_9285_12_OR_LATER(ah)) {

		INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2,

			       ARRAY_SIZE(ar9285Modes_9285_1_2), 5);

		INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2,

			       ARRAY_SIZE(ar9285Common_9285_1_2), 2);

		INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2);

		INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2);

	} else if (AR_SREV_9280_20_OR_LATER(ah)) {

		INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2,

			       ARRAY_SIZE(ar9280Modes_9280_2), 5);

		INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,

			       ARRAY_SIZE(ar9280Common_9280_2), 2);

		INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2);

		INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2);



		INIT_INI_ARRAY(&ah->iniModesFastClock,

			       ar9280Modes_fast_clock_9280_2,

			       ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);

			       ar9280Modes_fast_clock_9280_2);

	} else if (AR_SREV_9160_10_OR_LATER(ah)) {

		INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160,

			       ARRAY_SIZE(ar5416Modes_9160), 5);

		INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160,

			       ARRAY_SIZE(ar5416Common_9160), 2);

		INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160);

		INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160);

		if (AR_SREV_9160_11(ah)) {

			INIT_INI_ARRAY(&ah->iniAddac,

				       ar5416Addac_9160_1_1,

				       ARRAY_SIZE(ar5416Addac_9160_1_1), 2);

				       ar5416Addac_9160_1_1);

		} else {

			INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160,

				       ARRAY_SIZE(ar5416Addac_9160), 2);

			INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160);

		}

	} else if (AR_SREV_9100_OR_LATER(ah)) {

		INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100,

			       ARRAY_SIZE(ar5416Modes_9100), 5);

		INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100,

			       ARRAY_SIZE(ar5416Common_9100), 2);

		INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100,

			       ARRAY_SIZE(ar5416Bank6_9100), 3);

		INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100,

			       ARRAY_SIZE(ar5416Addac_9100), 2);

		INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);

		INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);

		INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);

		INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);

	} else {

		INIT_INI_ARRAY(&ah->iniModes, ar5416Modes,

			       ARRAY_SIZE(ar5416Modes), 5);

		INIT_INI_ARRAY(&ah->iniCommon, ar5416Common,

			       ARRAY_SIZE(ar5416Common), 2);

		INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC,

			       ARRAY_SIZE(ar5416Bank6TPC), 3);

		INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac,

			       ARRAY_SIZE(ar5416Addac), 2);

		INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);

		INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);

		INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);

		INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);

	}



	if (!AR_SREV_9280_20_OR_LATER(ah)) {

		/* Common for AR5416, AR913x, AR9160 */

		INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain,

			       ARRAY_SIZE(ar5416BB_RfGain), 3);



		INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0,

			       ARRAY_SIZE(ar5416Bank0), 2);

		INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1,

			       ARRAY_SIZE(ar5416Bank1), 2);

		INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2,

			       ARRAY_SIZE(ar5416Bank2), 2);

		INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3,

			       ARRAY_SIZE(ar5416Bank3), 3);

		INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7,

			       ARRAY_SIZE(ar5416Bank7), 2);

		INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain);



		INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0);

		INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1);

		INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2);

		INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);

		INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);



		/* Common for AR5416, AR9160 */

		if (!AR_SREV_9100(ah))

			INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6,

				       ARRAY_SIZE(ar5416Bank6), 3);

			INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);



		/* Common for AR913x, AR9160 */

		if (!AR_SREV_5416(ah))

			INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC_9100,

				       ARRAY_SIZE(ar5416Bank6TPC_9100), 3);

			INIT_INI_ARRAY(&ah->iniBank6TPC,

				      ar5416Bank6TPC_9100);

	}



	/* iniAddac needs to be modified for these chips */
@@ -148,13 +116,9 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah) 
	}

	if (AR_SREV_9287_11_OR_LATER(ah)) {

		INIT_INI_ARRAY(&ah->iniCckfirNormal,

		       ar9287Common_normal_cck_fir_coeff_9287_1_1,

		       ARRAY_SIZE(ar9287Common_normal_cck_fir_coeff_9287_1_1),

		       2);

		       ar9287Common_normal_cck_fir_coeff_9287_1_1);

		INIT_INI_ARRAY(&ah->iniCckfirJapan2484,

		       ar9287Common_japan_2484_cck_fir_coeff_9287_1_1,

		       ARRAY_SIZE(ar9287Common_japan_2484_cck_fir_coeff_9287_1_1),

		       2);

		       ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);

	}

}
@@ -168,20 +132,16 @@ static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah) 


		if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)

			INIT_INI_ARRAY(&ah->iniModesRxGain,

			ar9280Modes_backoff_13db_rxgain_9280_2,

			ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 5);

				       ar9280Modes_backoff_13db_rxgain_9280_2);

		else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF)

			INIT_INI_ARRAY(&ah->iniModesRxGain,

			ar9280Modes_backoff_23db_rxgain_9280_2,

			ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 5);

				       ar9280Modes_backoff_23db_rxgain_9280_2);

		else

			INIT_INI_ARRAY(&ah->iniModesRxGain,

			ar9280Modes_original_rxgain_9280_2,

			ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);

				       ar9280Modes_original_rxgain_9280_2);

	} else {

		INIT_INI_ARRAY(&ah->iniModesRxGain,

			ar9280Modes_original_rxgain_9280_2,

			ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);

			       ar9280Modes_original_rxgain_9280_2);

	}

}
@@ -191,16 +151,13 @@ static void ar9280_20_hw_init_txgain_ini(struct ath_hw *ah, u32 txgain_type) 
	    AR5416_EEP_MINOR_VER_19) {

		if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)

			INIT_INI_ARRAY(&ah->iniModesTxGain,

			ar9280Modes_high_power_tx_gain_9280_2,

			ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 5);

				       ar9280Modes_high_power_tx_gain_9280_2);

		else

			INIT_INI_ARRAY(&ah->iniModesTxGain,

			ar9280Modes_original_tx_gain_9280_2,

			ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);

				       ar9280Modes_original_tx_gain_9280_2);

	} else {

		INIT_INI_ARRAY(&ah->iniModesTxGain,

		ar9280Modes_original_tx_gain_9280_2,

		ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);

			       ar9280Modes_original_tx_gain_9280_2);

	}

}
@@ -208,12 +165,10 @@ static void ar9271_hw_init_txgain_ini(struct ath_hw *ah, u32 txgain_type) 
{

	if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)

		INIT_INI_ARRAY(&ah->iniModesTxGain,

			       ar9271Modes_high_power_tx_gain_9271,

			       ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 5);

			       ar9271Modes_high_power_tx_gain_9271);

	else

		INIT_INI_ARRAY(&ah->iniModesTxGain,

			       ar9271Modes_normal_power_tx_gain_9271,

			       ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 5);

			       ar9271Modes_normal_power_tx_gain_9271);

}



static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
@@ -222,8 +177,7 @@ static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah) 


	if (AR_SREV_9287_11_OR_LATER(ah))

		INIT_INI_ARRAY(&ah->iniModesRxGain,

		ar9287Modes_rx_gain_9287_1_1,

		ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 5);

			       ar9287Modes_rx_gain_9287_1_1);

	else if (AR_SREV_9280_20(ah))

		ar9280_20_hw_init_rxgain_ini(ah);
@@ -231,8 +185,7 @@ static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah) 
		ar9271_hw_init_txgain_ini(ah, txgain_type);

	} else if (AR_SREV_9287_11_OR_LATER(ah)) {

		INIT_INI_ARRAY(&ah->iniModesTxGain,

		ar9287Modes_tx_gain_9287_1_1,

		ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 5);

			       ar9287Modes_tx_gain_9287_1_1);

	} else if (AR_SREV_9280_20(ah)) {

		ar9280_20_hw_init_txgain_ini(ah, txgain_type);

	} else if (AR_SREV_9285_12_OR_LATER(ah)) {
@@ -240,26 +193,18 @@ static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah) 
		if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER) {

			if (AR_SREV_9285E_20(ah)) {

				INIT_INI_ARRAY(&ah->iniModesTxGain,

				ar9285Modes_XE2_0_high_power,

				ARRAY_SIZE(

				  ar9285Modes_XE2_0_high_power), 5);

					       ar9285Modes_XE2_0_high_power);

			} else {

				INIT_INI_ARRAY(&ah->iniModesTxGain,

				ar9285Modes_high_power_tx_gain_9285_1_2,

				ARRAY_SIZE(

				  ar9285Modes_high_power_tx_gain_9285_1_2), 5);

					ar9285Modes_high_power_tx_gain_9285_1_2);

			}

		} else {

			if (AR_SREV_9285E_20(ah)) {

				INIT_INI_ARRAY(&ah->iniModesTxGain,

				ar9285Modes_XE2_0_normal_power,

				ARRAY_SIZE(

				  ar9285Modes_XE2_0_normal_power), 5);

					       ar9285Modes_XE2_0_normal_power);

			} else {

				INIT_INI_ARRAY(&ah->iniModesTxGain,

				ar9285Modes_original_tx_gain_9285_1_2,

				ARRAY_SIZE(

				  ar9285Modes_original_tx_gain_9285_1_2), 5);

					ar9285Modes_original_tx_gain_9285_1_2);

			}

		}

	}

drivers/net/wireless/ath/ath9k/ar9003_hw.c

+146 −395

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/wireless/ath/ath9k/calib.h

+3 −3
Original line number Diff line number Diff line
@@ -30,10 +30,10 @@ struct ar5416IniArray { 
	u32 ia_columns;

};



#define INIT_INI_ARRAY(iniarray, array, rows, columns) do {	\

#define INIT_INI_ARRAY(iniarray, array) do {	\

		(iniarray)->ia_array = (u32 *)(array);		\

		(iniarray)->ia_rows = (rows);			\

		(iniarray)->ia_columns = (columns);		\

		(iniarray)->ia_rows = ARRAY_SIZE(array);	\

		(iniarray)->ia_columns = ARRAY_SIZE(array[0]);	\

	} while (0)



#define INI_RA(iniarray, row, column) \