Commit a43e767d authored by Yong Wu's avatar Yong Wu Committed by Joerg Roedel
Browse files

iommu/mediatek: mt8195: Add iova_region_larb_msk 



Add iova_region_larb_msk for mt8195. We separate the 16GB iova regions
by each device's larbid/portid.
Refer to include/dt-bindings/memory/mt8195-memory-port.h

Signed-off-by: default avatarYong Wu <yong.wu@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230411093144.2690-7-yong.wu@mediatek.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 6b1317f9

drivers/iommu/mtk_iommu.c

+17 −0
Original line number Original line Diff line number Diff line
@@ -1587,6 +1587,21 @@ static const struct mtk_iommu_plat_data mt8195_data_infra = { 
	.iova_region_nr   = ARRAY_SIZE(single_domain),

	.iova_region_nr   = ARRAY_SIZE(single_domain),

};

};





static const unsigned int mt8195_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK_LARB_NR_MAX] = {

	[0] = {~0, ~0, ~0, ~0},               /* Region0: all ports for larb0/1/2/3 */

	[1] = {0, 0, 0, 0, 0, 0, 0, 0,

	       0, 0, 0, 0, 0, 0, 0, 0,

	       0, 0, 0, ~0, ~0, ~0, ~0, ~0,   /* Region1: larb19/20/21/22/23/24 */

	       ~0},

	[2] = {0, 0, 0, 0, ~0, ~0, ~0, ~0,    /* Region2: the other larbs. */

	       ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0,

	       ~0, ~0, 0, 0, 0, 0, 0, 0,

	       0, ~0, ~0, ~0, ~0},

	[3] = {0},

	[4] = {[18] = BIT(0) | BIT(1)},       /* Only larb18 port0/1 */

	[5] = {[18] = BIT(2) | BIT(3)},       /* Only larb18 port2/3 */

};



static const struct mtk_iommu_plat_data mt8195_data_vdo = {

static const struct mtk_iommu_plat_data mt8195_data_vdo = {

	.m4u_plat	= M4U_MT8195,

	.m4u_plat	= M4U_MT8195,

	.flags          = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |

	.flags          = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
@@ -1597,6 +1612,7 @@ static const struct mtk_iommu_plat_data mt8195_data_vdo = { 
	.banks_enable   = {true},

	.banks_enable   = {true},

	.iova_region	= mt8192_multi_dom,

	.iova_region	= mt8192_multi_dom,

	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),

	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),

	.iova_region_larb_msk = mt8195_larb_region_msk,

	.larbid_remap   = {{2, 0}, {21}, {24}, {7}, {19}, {9, 10, 11},

	.larbid_remap   = {{2, 0}, {21}, {24}, {7}, {19}, {9, 10, 11},

			   {13, 17, 15/* 17b */, 25}, {5}},

			   {13, 17, 15/* 17b */, 25}, {5}},

};

};
@@ -1611,6 +1627,7 @@ static const struct mtk_iommu_plat_data mt8195_data_vpp = { 
	.banks_enable   = {true},

	.banks_enable   = {true},

	.iova_region	= mt8192_multi_dom,

	.iova_region	= mt8192_multi_dom,

	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),

	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),

	.iova_region_larb_msk = mt8195_larb_region_msk,

	.larbid_remap   = {{1}, {3},

	.larbid_remap   = {{1}, {3},

			   {22, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 23},

			   {22, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 23},

			   {8}, {20}, {12},

			   {8}, {20}, {12},