Commit a5ac24ba authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm8450: add RPMH_REGULATOR_LEVEL_LOW_SVS_D1 



Add another power saving state used on SM8450. Unfortunately adding it
in proper place causes renumbering of all the opp states in sm8450.dtsi

Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-2-dmitry.baryshkov@linaro.org
parent 861b67fb

arch/arm64/boot/dts/qcom/sm8450.dtsi

+12 −8
Original line number Diff line number Diff line
@@ -3580,35 +3580,39 @@ rpmhpd_opp_min_svs: opp2 { 
						opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;

					};



					rpmhpd_opp_low_svs: opp3 {

					rpmhpd_opp_low_svs_d1: opp3 {

						opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;

					};



					rpmhpd_opp_low_svs: opp4 {

						opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;

					};



					rpmhpd_opp_svs: opp4 {

					rpmhpd_opp_svs: opp5 {

						opp-level = <RPMH_REGULATOR_LEVEL_SVS>;

					};



					rpmhpd_opp_svs_l1: opp5 {

					rpmhpd_opp_svs_l1: opp6 {

						opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;

					};



					rpmhpd_opp_nom: opp6 {

					rpmhpd_opp_nom: opp7 {

						opp-level = <RPMH_REGULATOR_LEVEL_NOM>;

					};



					rpmhpd_opp_nom_l1: opp7 {

					rpmhpd_opp_nom_l1: opp8 {

						opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;

					};



					rpmhpd_opp_nom_l2: opp8 {

					rpmhpd_opp_nom_l2: opp9 {

						opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;

					};



					rpmhpd_opp_turbo: opp9 {

					rpmhpd_opp_turbo: opp10 {

						opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;

					};



					rpmhpd_opp_turbo_l1: opp10 {

					rpmhpd_opp_turbo_l1: opp11 {

						opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;

					};

				};

include/dt-bindings/power/qcom-rpmpd.h

+1 −0
Original line number Diff line number Diff line
@@ -190,6 +190,7 @@ 
/* SDM845 Power Domain performance levels */

#define RPMH_REGULATOR_LEVEL_RETENTION	16

#define RPMH_REGULATOR_LEVEL_MIN_SVS	48

#define RPMH_REGULATOR_LEVEL_LOW_SVS_D1	56

#define RPMH_REGULATOR_LEVEL_LOW_SVS	64

#define RPMH_REGULATOR_LEVEL_SVS	128

#define RPMH_REGULATOR_LEVEL_SVS_L0	144