Commit a668acb8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-next-2021-09-10' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Dave Airlie:
 "Just an initial bunch of fixes for the merge window, amdgpu is most of
  them with a few ttm fixes and an fbdev avoid multiply overflow fix.

  core:
   - Make some dma-buf config options depend on DMA_SHARED_BUFFER
   - Handle multiplication overflow of fbdev xres/yres in the core

  ttm:
   - Fix ttm_bo_move_memcpy() when ttm_resource is subclassed
   - Fix ttm deadlock if target BO isn't idle
   - ttm build fix
   - ttm docs fix

  dma-buf:
   - config option fixes

  fbdev:
   - limit resolutions to avoid int overflow

  i915:
   - stddef change.

  amdgpu:
   - Misc cleanups, typo fixes
   - EEPROM fix
   - Add some new PCI IDs
   - Scatter/Gather display support for Yellow Carp
   - PCIe DPM fix for RKL platforms
   - RAS fix

  amdkfd:
   - SVM fix

  vc4:
   - static function fix

  mgag200:
   - fix uninit var

  panfrost:
   - lock_region fixes"

* tag 'drm-next-2021-09-10' of git://anongit.freedesktop.org/drm/drm: (36 commits)
  drm/ttm: Fix a deadlock if the target BO is not idle during swap
  fbmem: don't allow too huge resolutions
  dma-buf: DMABUF_SYSFS_STATS should depend on DMA_SHARED_BUFFER
  dma-buf: DMABUF_DEBUG should depend on DMA_SHARED_BUFFER
  drm/i915: use linux/stddef.h due to "isystem: trim/fixup stdarg.h and other headers"
  dma-buf: DMABUF_MOVE_NOTIFY should depend on DMA_SHARED_BUFFER
  drm/amdkfd: drop process ref count when xnack disable
  drm/amdgpu: enable more pm sysfs under SRIOV 1-VF mode
  drm/amdgpu: fix fdinfo race with process exit
  drm/amdgpu: Fix a deadlock if previous GEM object allocation fails
  drm/amdgpu: stop scheduler when calling hw_fini (v2)
  drm/amdgpu: Clear RAS interrupt status on aldebaran
  drm/amd/display: Initialize lt_settings on instantiation
  drm/amd/display: cleanup idents after a revert
  drm/amd/display: Fix memory leak reported by coverity
  drm/ttm: Fix ttm_bo_move_memcpy() for subclassed struct ttm_resource
  drm/amdgpu/swsmu: fix spelling mistake "minimun" -> "minimum"
  drm/amdgpu: Disable PCIE_DPM on Intel RKL Platform
  drm/amdgpu: show both cmd id and name when psp cmd failed
  drm/amd/display: setup system context for APUs
  ...
parents 4396a731 70982eef

Documentation/gpu/drm-mm.rst

+1 −1
Original line number Original line Diff line number Diff line
@@ -37,7 +37,7 @@ TTM initialization 
    This section is outdated.

    This section is outdated.





Drivers wishing to support TTM must pass a filled :c:type:`ttm_bo_driver

Drivers wishing to support TTM must pass a filled :c:type:`ttm_bo_driver

<ttm_bo_driver>` structure to ttm_bo_device_init, together with an

<ttm_bo_driver>` structure to ttm_device_init, together with an

initialized global reference to the memory manager.  The ttm_bo_driver

initialized global reference to the memory manager.  The ttm_bo_driver

structure contains several fields with function pointers for

structure contains several fields with function pointers for

initializing the TTM, allocating and freeing memory, waiting for command

initializing the TTM, allocating and freeing memory, waiting for command

drivers/dma-buf/Kconfig

+3 −1
Original line number Original line Diff line number Diff line
@@ -42,6 +42,7 @@ config UDMABUF 
config DMABUF_MOVE_NOTIFY

config DMABUF_MOVE_NOTIFY

	bool "Move notify between drivers (EXPERIMENTAL)"

	bool "Move notify between drivers (EXPERIMENTAL)"

	default n

	default n

	depends on DMA_SHARED_BUFFER

	help

	help

	  Don't pin buffers if the dynamic DMA-buf interface is available on

	  Don't pin buffers if the dynamic DMA-buf interface is available on

	  both the exporter as well as the importer. This fixes a security

	  both the exporter as well as the importer. This fixes a security
@@ -52,6 +53,7 @@ config DMABUF_MOVE_NOTIFY 




config DMABUF_DEBUG

config DMABUF_DEBUG

	bool "DMA-BUF debug checks"

	bool "DMA-BUF debug checks"

	depends on DMA_SHARED_BUFFER

	default y if DMA_API_DEBUG

	default y if DMA_API_DEBUG

	help

	help

	  This option enables additional checks for DMA-BUF importers and

	  This option enables additional checks for DMA-BUF importers and
@@ -74,7 +76,7 @@ menuconfig DMABUF_HEAPS 




menuconfig DMABUF_SYSFS_STATS

menuconfig DMABUF_SYSFS_STATS

	bool "DMA-BUF sysfs statistics"

	bool "DMA-BUF sysfs statistics"

	select DMA_SHARED_BUFFER

	depends on DMA_SHARED_BUFFER

	help

	help

	   Choose this option to enable DMA-BUF sysfs statistics

	   Choose this option to enable DMA-BUF sysfs statistics

	   in location /sys/kernel/dmabuf/buffers.

	   in location /sys/kernel/dmabuf/buffers.

drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c

+33 −17
Original line number Original line Diff line number Diff line
@@ -468,14 +468,18 @@ bool amdgpu_atomfirmware_dynamic_boot_config_supported(struct amdgpu_device *ade 
	return (fw_cap & ATOM_FIRMWARE_CAP_DYNAMIC_BOOT_CFG_ENABLE) ? true : false;

	return (fw_cap & ATOM_FIRMWARE_CAP_DYNAMIC_BOOT_CFG_ENABLE) ? true : false;

}

}





/*

/**

 * Helper function to query RAS EEPROM address

 * amdgpu_atomfirmware_ras_rom_addr -- Get the RAS EEPROM addr from VBIOS

 *

 * adev: amdgpu_device pointer

 * @adev: amdgpu_device pointer

 * i2c_address: pointer to u8; if not NULL, will contain

 *    the RAS EEPROM address if the function returns true

 *

 *

 * Return true if vbios supports ras rom address reporting

 * Return true if VBIOS supports RAS EEPROM address reporting,

 * else return false. If true and @i2c_address is not NULL,

 * will contain the RAS ROM address.

 */

 */

bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t* i2c_address)

bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev,

				      u8 *i2c_address)

{

{

	struct amdgpu_mode_info *mode_info = &adev->mode_info;

	struct amdgpu_mode_info *mode_info = &adev->mode_info;

	int index;

	int index;
@@ -483,26 +487,38 @@ bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t* i2c_a 
	union firmware_info *firmware_info;

	union firmware_info *firmware_info;

	u8 frev, crev;

	u8 frev, crev;





	if (i2c_address == NULL)

		return false;



	*i2c_address = 0;



	index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,

	index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,

					    firmwareinfo);

					    firmwareinfo);





	if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context,

	if (amdgpu_atom_parse_data_header(adev->mode_info.atom_context,

				index, &size, &frev, &crev, &data_offset)) {

					  index, &size, &frev, &crev,

					  &data_offset)) {

		/* support firmware_info 3.4 + */

		/* support firmware_info 3.4 + */

		if ((frev == 3 && crev >=4) || (frev > 3)) {

		if ((frev == 3 && crev >=4) || (frev > 3)) {

			firmware_info = (union firmware_info *)

			firmware_info = (union firmware_info *)

				(mode_info->atom_context->bios + data_offset);

				(mode_info->atom_context->bios + data_offset);

			/* The ras_rom_i2c_slave_addr should ideally

			 * be a 19-bit EEPROM address, which would be

			 * used as is by the driver; see top of

			 * amdgpu_eeprom.c.

			 *

			 * When this is the case, 0 is of course a

			 * valid RAS EEPROM address, in which case,

			 * we'll drop the first "if (firm...)" and only

			 * leave the check for the pointer.

			 *

			 * The reason this works right now is because

			 * ras_rom_i2c_slave_addr contains the EEPROM

			 * device type qualifier 1010b in the top 4

			 * bits.

			 */

			if (firmware_info->v34.ras_rom_i2c_slave_addr) {

				if (i2c_address)

					*i2c_address = firmware_info->v34.ras_rom_i2c_slave_addr;

					*i2c_address = firmware_info->v34.ras_rom_i2c_slave_addr;

				return true;

			}

		}

		}

	}

	}



	if (*i2c_address != 0)

		return true;





	return false;

	return false;

}

}

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -522,6 +522,7 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev, 
			break;

			break;

		case CHIP_RENOIR:

		case CHIP_RENOIR:

		case CHIP_VANGOGH:

		case CHIP_VANGOGH:

		case CHIP_YELLOW_CARP:

			domain |= AMDGPU_GEM_DOMAIN_GTT;

			domain |= AMDGPU_GEM_DOMAIN_GTT;

			break;

			break;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+17 −0
Original line number Original line Diff line number Diff line
@@ -1181,7 +1181,12 @@ static const struct pci_device_id pciidlist[] = { 
	{0x1002, 0x73A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73A5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73A8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73A9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73AB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73AB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73AC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73AD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73AE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73AE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73BF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},

	{0x1002, 0x73BF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
@@ -1197,6 +1202,11 @@ static const struct pci_device_id pciidlist[] = { 
	{0x1002, 0x73C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73C3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73C3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73DD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73DE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},

	{0x1002, 0x73DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},





	/* DIMGREY_CAVEFISH */

	/* DIMGREY_CAVEFISH */
@@ -1204,6 +1214,13 @@ static const struct pci_device_id pciidlist[] = { 
	{0x1002, 0x73E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73E2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73E2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73E8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73E9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73EA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73EB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73EC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73ED, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73EF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},

	{0x1002, 0x73FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},





	/* Aldebaran */

	/* Aldebaran */