Commit a6fc2f1b authored by Alexander Stein's avatar Alexander Stein Committed by Greg Kroah-Hartman
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usb: dwc3: core: add gfladj_refclk_lpm_sel quirk



This selects the SOF/ITP counter be running on ref_clk. As documented
U2_FREECLK_EXISTS has to be set to 0 as well.

Reviewed-by: default avatarLi Jun <jun.li@nxp.com>
Signed-off-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220915062855.751881-3-alexander.stein@ew.tq-group.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 206732f9
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+7 −1
Original line number Original line Diff line number Diff line
@@ -408,6 +408,10 @@ static void dwc3_ref_clk_period(struct dwc3 *dwc)
	reg |= FIELD_PREP(DWC3_GFLADJ_REFCLK_FLADJ_MASK, fladj)
	reg |= FIELD_PREP(DWC3_GFLADJ_REFCLK_FLADJ_MASK, fladj)
	    |  FIELD_PREP(DWC3_GFLADJ_240MHZDECR, decr >> 1)
	    |  FIELD_PREP(DWC3_GFLADJ_240MHZDECR, decr >> 1)
	    |  FIELD_PREP(DWC3_GFLADJ_240MHZDECR_PLS1, decr & 1);
	    |  FIELD_PREP(DWC3_GFLADJ_240MHZDECR_PLS1, decr & 1);

	if (dwc->gfladj_refclk_lpm_sel)
		reg |=  DWC3_GFLADJ_REFCLK_LPM_SEL;

	dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
	dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
}
}


@@ -789,7 +793,7 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
	else
	else
		reg |= DWC3_GUSB2PHYCFG_ENBLSLPM;
		reg |= DWC3_GUSB2PHYCFG_ENBLSLPM;


	if (dwc->dis_u2_freeclk_exists_quirk)
	if (dwc->dis_u2_freeclk_exists_quirk || dwc->gfladj_refclk_lpm_sel)
		reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
		reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;


	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
@@ -1525,6 +1529,8 @@ static void dwc3_get_properties(struct dwc3 *dwc)
				"snps,dis-tx-ipgap-linecheck-quirk");
				"snps,dis-tx-ipgap-linecheck-quirk");
	dwc->parkmode_disable_ss_quirk = device_property_read_bool(dev,
	dwc->parkmode_disable_ss_quirk = device_property_read_bool(dev,
				"snps,parkmode-disable-ss-quirk");
				"snps,parkmode-disable-ss-quirk");
	dwc->gfladj_refclk_lpm_sel = device_property_read_bool(dev,
				"snps,gfladj-refclk-lpm-sel-quirk");


	dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
	dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
				"snps,tx_de_emphasis_quirk");
				"snps,tx_de_emphasis_quirk");
+2 −0
Original line number Original line Diff line number Diff line
@@ -391,6 +391,7 @@
#define DWC3_GFLADJ_30MHZ_SDBND_SEL		BIT(7)
#define DWC3_GFLADJ_30MHZ_SDBND_SEL		BIT(7)
#define DWC3_GFLADJ_30MHZ_MASK			0x3f
#define DWC3_GFLADJ_30MHZ_MASK			0x3f
#define DWC3_GFLADJ_REFCLK_FLADJ_MASK		GENMASK(21, 8)
#define DWC3_GFLADJ_REFCLK_FLADJ_MASK		GENMASK(21, 8)
#define DWC3_GFLADJ_REFCLK_LPM_SEL		BIT(23)
#define DWC3_GFLADJ_240MHZDECR			GENMASK(30, 24)
#define DWC3_GFLADJ_240MHZDECR			GENMASK(30, 24)
#define DWC3_GFLADJ_240MHZDECR_PLS1		BIT(31)
#define DWC3_GFLADJ_240MHZDECR_PLS1		BIT(31)


@@ -1312,6 +1313,7 @@ struct dwc3 {
	unsigned		dis_del_phy_power_chg_quirk:1;
	unsigned		dis_del_phy_power_chg_quirk:1;
	unsigned		dis_tx_ipgap_linecheck_quirk:1;
	unsigned		dis_tx_ipgap_linecheck_quirk:1;
	unsigned		parkmode_disable_ss_quirk:1;
	unsigned		parkmode_disable_ss_quirk:1;
	unsigned		gfladj_refclk_lpm_sel:1;


	unsigned		tx_de_emphasis_quirk:1;
	unsigned		tx_de_emphasis_quirk:1;
	unsigned		tx_de_emphasis:2;
	unsigned		tx_de_emphasis:2;