Commit a9dc23be authored by Peng Ju Zhou's avatar Peng Ju Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: Modify GC register access from MMIO to RLCG in file soc15.c 



In SRIOV environment, KMD should access GC registers
with RLCG if GC indirect access flag enabled.

Signed-off-by: default avatarPeng Ju Zhou <PengJu.Zhou@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d697f3d8

drivers/gpu/drm/amd/amdgpu/soc15.c

+5 −2
Original line number Diff line number Diff line
@@ -633,7 +633,9 @@ void soc15_program_register_sequence(struct amdgpu_device *adev, 
		if (entry->and_mask == 0xffffffff) {

			tmp = entry->or_mask;

		} else {

			tmp = RREG32(reg);

			tmp = (entry->hwip == GC_HWIP) ?

				RREG32_SOC15_IP(GC, reg) : RREG32(reg);



			tmp &= ~(entry->and_mask);

			tmp |= (entry->or_mask & entry->and_mask);

		}
@@ -644,7 +646,8 @@ void soc15_program_register_sequence(struct amdgpu_device *adev, 
			reg == SOC15_REG_OFFSET(GC, 0, mmSH_MEM_CONFIG))

			WREG32_RLC(reg, tmp);

		else

			WREG32(reg, tmp);

			(entry->hwip == GC_HWIP) ?

				WREG32_SOC15_IP(GC, reg, tmp) : WREG32(reg, tmp);



	}