Commit aa3dfd46 authored by Martin Kaiser's avatar Martin Kaiser Committed by Greg Kroah-Hartman
Browse files

staging: r8188eu: remove path parameter from phy_RFSerialRead 



All callers of phy_RFSerialRead set the eRFPath parameter to
RF_PATH_A. Remove the parameter and use RF_PATH_A directly.

Signed-off-by: default avatarMartin Kaiser <martin@kaiser.cx>
Link: https://lore.kernel.org/r/20220212161737.381841-10-martin@kaiser.cx


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c45049ad

drivers/staging/r8188eu/hal/rtl8188e_phycfg.c

+5 −13
Original line number Diff line number Diff line
@@ -104,7 +104,6 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u3 
*

* Input:

*			struct adapter *Adapter,

*			enum rf_radio_path eRFPath,	Radio path of A/B/C/D

*			u32			Offset,		The target address to be read

*

* Output:	None
@@ -119,13 +118,12 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u3 
static	u32

phy_RFSerialRead(

		struct adapter *Adapter,

		enum rf_radio_path eRFPath,

		u32 Offset

	)

{

	u32 retValue = 0;

	struct hal_data_8188e *pHalData = &Adapter->haldata;

	struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath];

	struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[RF_PATH_A];

	u32 NewOffset;

	u32 tmplong, tmplong2;

	u8 	RfPiEnable = 0;
@@ -143,10 +141,7 @@ phy_RFSerialRead( 
	/*  For RF A/B write 0x824/82c(does not work in the future) */

	/*  We must use 0x824 for RF A and B to execute read trigger */

	tmplong = rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord);

	if (eRFPath == RF_PATH_A)

	tmplong2 = tmplong;

	else

		tmplong2 = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord);



	tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset << 23) | bLSSIReadEdge;	/* T65 RF */
@@ -158,10 +153,7 @@ phy_RFSerialRead( 


	udelay(10);/* PlatformStallExecution(10); */



	if (eRFPath == RF_PATH_A)

	RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT(8));

	else if (eRFPath == RF_PATH_B)

		RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT(8));



	if (RfPiEnable) {	/*  Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */

		retValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData);
@@ -265,7 +257,7 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask) 
{

	u32 Original_Value, Readback_Value, BitShift;



	Original_Value = phy_RFSerialRead(Adapter, RF_PATH_A, RegAddr);

	Original_Value = phy_RFSerialRead(Adapter, RegAddr);



	BitShift =  phy_CalculateBitShift(BitMask);

	Readback_Value = (Original_Value & BitMask) >> BitShift;
@@ -301,7 +293,7 @@ rtl8188e_PHY_SetRFReg( 


	/*  RF data is 12 bits only */

	if (BitMask != bRFRegOffsetMask) {

		Original_Value = phy_RFSerialRead(Adapter, RF_PATH_A, RegAddr);

		Original_Value = phy_RFSerialRead(Adapter, RegAddr);

		BitShift =  phy_CalculateBitShift(BitMask);

		Data = ((Original_Value & (~BitMask)) | (Data << BitShift));

	}