Commit aaf186d8 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

pinctrl: renesas: r8a77951: Share QSPI pin group data



Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.

This reduces kernel size by 32 bytes.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3f81abaecbbca5e7a43586682472d44870c695ee.1640269757.git.geert+renesas@glider.be
parent cfa6135c
Loading
Loading
Loading
Loading
+8 −22
Original line number Diff line number Diff line
@@ -3268,20 +3268,13 @@ static const unsigned int qspi0_ctrl_pins[] = {
static const unsigned int qspi0_ctrl_mux[] = {
	QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
};
static const unsigned int qspi0_data2_pins[] = {
	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
	PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,
};
static const unsigned int qspi0_data2_mux[] = {
	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
};
static const unsigned int qspi0_data4_pins[] = {
static const unsigned int qspi0_data_pins[] = {
	/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
	PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1,
	/* QSPI0_IO2, QSPI0_IO3 */
	PIN_QSPI0_IO2, PIN_QSPI0_IO3,
};
static const unsigned int qspi0_data4_mux[] = {
static const unsigned int qspi0_data_mux[] = {
	QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
	QSPI0_IO2_MARK, QSPI0_IO3_MARK,
};
@@ -3293,20 +3286,13 @@ static const unsigned int qspi1_ctrl_pins[] = {
static const unsigned int qspi1_ctrl_mux[] = {
	QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
};
static const unsigned int qspi1_data2_pins[] = {
	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
	PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,
};
static const unsigned int qspi1_data2_mux[] = {
	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
};
static const unsigned int qspi1_data4_pins[] = {
static const unsigned int qspi1_data_pins[] = {
	/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
	PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1,
	/* QSPI1_IO2, QSPI1_IO3 */
	PIN_QSPI1_IO2, PIN_QSPI1_IO3,
};
static const unsigned int qspi1_data4_mux[] = {
static const unsigned int qspi1_data_mux[] = {
	QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
	QSPI1_IO2_MARK, QSPI1_IO3_MARK,
};
@@ -4437,11 +4423,11 @@ static const struct {
		SH_PFC_PIN_GROUP(pwm6_a),
		SH_PFC_PIN_GROUP(pwm6_b),
		SH_PFC_PIN_GROUP(qspi0_ctrl),
		SH_PFC_PIN_GROUP(qspi0_data2),
		SH_PFC_PIN_GROUP(qspi0_data4),
		BUS_DATA_PIN_GROUP(qspi0_data, 2),
		BUS_DATA_PIN_GROUP(qspi0_data, 4),
		SH_PFC_PIN_GROUP(qspi1_ctrl),
		SH_PFC_PIN_GROUP(qspi1_data2),
		SH_PFC_PIN_GROUP(qspi1_data4),
		BUS_DATA_PIN_GROUP(qspi1_data, 2),
		BUS_DATA_PIN_GROUP(qspi1_data, 4),
		SH_PFC_PIN_GROUP(sata0_devslp_a),
		SH_PFC_PIN_GROUP(sata0_devslp_b),
		SH_PFC_PIN_GROUP(scif0_data),