Commit aaf85b46 authored by Krishna chaitanya chundru's avatar Krishna chaitanya chundru Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks

parent 68aa8348
Loading
Loading
Loading
Loading
+6 −2
Original line number Diff line number Diff line
@@ -2044,7 +2044,9 @@ pcie1: pci@1c08000 {
				 <&gcc GCC_PCIE_1_SLV_AXI_CLK>,
				 <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
				 <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
				 <&gcc GCC_DDRSS_PCIE_SF_CLK>;
				 <&gcc GCC_DDRSS_PCIE_SF_CLK>,
				 <&gcc GCC_AGGRE_NOC_PCIE_CENTER_SF_AXI_CLK>,
				 <&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>;

			clock-names = "pipe",
				      "pipe_mux",
@@ -2056,7 +2058,9 @@ pcie1: pci@1c08000 {
				      "bus_slave",
				      "slave_q2a",
				      "tbu",
				      "ddrss_sf_tbu";
				      "ddrss_sf_tbu",
				      "aggre0",
				      "aggre1";

			assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
			assigned-clock-rates = <19200000>;