Commit ab876728 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge tag 'v4.5-rc5' into efi/core, before queueing up new changes 



Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 35575e0e 81f70ba2

Documentation/cgroup-v2.txt

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@@ -7,7 +7,7 @@ This is the authoritative documentation on the design, interface and 
conventions of cgroup v2.  It describes all userland-visible aspects

conventions of cgroup v2.  It describes all userland-visible aspects

of cgroup including core and specific controller behaviors.  All

of cgroup including core and specific controller behaviors.  All

future changes must be reflected in this document.  Documentation for

future changes must be reflected in this document.  Documentation for

v1 is available under Documentation/cgroup-legacy/.

v1 is available under Documentation/cgroup-v1/.





CONTENTS

CONTENTS
@@ -843,6 +843,10 @@ PAGE_SIZE multiple when read back. 
		Amount of memory used to cache filesystem data,

		Amount of memory used to cache filesystem data,

		including tmpfs and shared memory.

		including tmpfs and shared memory.





	  sock



		Amount of memory used in network transmission buffers



	  file_mapped

	  file_mapped





		Amount of cached filesystem data mapped with mmap()

		Amount of cached filesystem data mapped with mmap()

Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt

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@@ -30,7 +30,7 @@ that they are defined using standard clock bindings with following 
clock-output-names:

clock-output-names:

 - "xin24m" - crystal input - required,

 - "xin24m" - crystal input - required,

 - "ext_i2s" - external I2S clock - optional,

 - "ext_i2s" - external I2S clock - optional,

 - "ext_gmac" - external GMAC clock - optional

 - "rmii_clkin" - external EMAC clock - optional





Example: Clock controller node:

Example: Clock controller node:

Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt

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@@ -24,9 +24,8 @@ Main node required properties: 
		1 = edge triggered

		1 = edge triggered

		4 = level triggered

		4 = level triggered





  Cells 4 and beyond are reserved for future use. When the 1st cell

  Cells 4 and beyond are reserved for future use and must have a value

  has a value of 0 or 1, cells 4 and beyond act as padding, and may be

  of 0 if present.

  ignored. It is recommended that padding cells have a value of 0.





- reg : Specifies base physical address(s) and size of the GIC

- reg : Specifies base physical address(s) and size of the GIC

  registers, in the following order:

  registers, in the following order:

Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt

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@@ -8,6 +8,7 @@ OHCI and EHCI controllers. 
Required properties:

Required properties:

- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;

- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;

	      "renesas,pci-r8a7791" for the R8A7791 SoC;

	      "renesas,pci-r8a7791" for the R8A7791 SoC;

	      "renesas,pci-r8a7793" for the R8A7793 SoC;

	      "renesas,pci-r8a7794" for the R8A7794 SoC;

	      "renesas,pci-r8a7794" for the R8A7794 SoC;

	      "renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device

	      "renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device

Documentation/devicetree/bindings/pci/rcar-pci.txt

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@@ -4,6 +4,7 @@ Required properties: 
compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC;

compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC;

	    "renesas,pcie-r8a7790" for the R8A7790 SoC;

	    "renesas,pcie-r8a7790" for the R8A7790 SoC;

	    "renesas,pcie-r8a7791" for the R8A7791 SoC;

	    "renesas,pcie-r8a7791" for the R8A7791 SoC;

	    "renesas,pcie-r8a7793" for the R8A7793 SoC;

	    "renesas,pcie-r8a7795" for the R8A7795 SoC;

	    "renesas,pcie-r8a7795" for the R8A7795 SoC;

	    "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device.

	    "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device.