Commit ac1128c9 authored by James Zhu's avatar James Zhu Committed by Alex Deucher
Browse files

drm/amdgpu/vcn3.0: only SIENNA_CICHLID need specify instance for dec/enc 



Only SIENNA_CICHLID(VCN3) has 2 unsymmetrical instances, there're less
codecs on instance 1, we use 0 for decode and 1 for encode.

Signed-off-by: default avatarJames Zhu <James.Zhu@amd.com>
Reviewed-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e098bc96

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

+2 −2
Original line number Diff line number Diff line
@@ -198,7 +198,7 @@ static int vcn_v3_0_sw_init(void *handle) 
		} else {

			ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 8 * i;

		}

		if (i != 0)

		if (adev->asic_type == CHIP_SIENNA_CICHLID && i != 0)

			ring->no_scheduler = true;

		sprintf(ring->name, "vcn_dec_%d", i);

		r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[i].irq, 0,
@@ -222,7 +222,7 @@ static int vcn_v3_0_sw_init(void *handle) 
			} else {

				ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 2 + j + 8 * i;

			}

			if (i != 1)

			if (adev->asic_type == CHIP_SIENNA_CICHLID && i != 1)

				ring->no_scheduler = true;

			sprintf(ring->name, "vcn_enc_%d.%d", i, j);

			r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[i].irq, 0,