Commit ae08e43e authored by Fernando Luis VazquezCao's avatar Fernando Luis VazquezCao Committed by Andi Kleen
Browse files

[PATCH] i386: use safe_apic_wait_icr_idle - i386 



The functionality provided by the new safe_apic_wait_icr_idle is being
open-coded all over "kernel/smpboot.c". Use safe_apic_wait_icr_idle
instead to consolidate code and ease maintenance.

Signed-off-by: default avatarFernando Luis Vazquez Cao <fernando@oss.ntt.co.jp>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
parent 8339e9fb

arch/i386/kernel/smpboot.c

+8 −28
Original line number Original line Diff line number Diff line
@@ -563,8 +563,8 @@ static inline void __inquire_remote_apic(int apicid) 
static int __devinit

static int __devinit

wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)

wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)

{

{

	unsigned long send_status = 0, accept_status = 0;

	unsigned long send_status, accept_status = 0;

	int timeout, maxlvt;

	int maxlvt;





	/* Target chip */

	/* Target chip */

	apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));

	apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
@@ -574,12 +574,7 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip) 
	apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);

	apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);





	Dprintk("Waiting for send to finish...\n");

	Dprintk("Waiting for send to finish...\n");

	timeout = 0;

	send_status = safe_apic_wait_icr_idle();

	do {

		Dprintk("+");

		udelay(100);

		send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;

	} while (send_status && (timeout++ < 1000));





	/*

	/*

	 * Give the other CPU some time to accept the IPI.

	 * Give the other CPU some time to accept the IPI.
@@ -609,8 +604,8 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip) 
static int __devinit

static int __devinit

wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)

wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)

{

{

	unsigned long send_status = 0, accept_status = 0;

	unsigned long send_status, accept_status = 0;

	int maxlvt, timeout, num_starts, j;

	int maxlvt, num_starts, j;





	/*

	/*

	 * Be paranoid about clearing APIC errors.

	 * Be paranoid about clearing APIC errors.
@@ -635,12 +630,7 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) 
				| APIC_DM_INIT);

				| APIC_DM_INIT);





	Dprintk("Waiting for send to finish...\n");

	Dprintk("Waiting for send to finish...\n");

	timeout = 0;

	send_status = safe_apic_wait_icr_idle();

	do {

		Dprintk("+");

		udelay(100);

		send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;

	} while (send_status && (timeout++ < 1000));





	mdelay(10);

	mdelay(10);
@@ -653,12 +643,7 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) 
	apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);

	apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);





	Dprintk("Waiting for send to finish...\n");

	Dprintk("Waiting for send to finish...\n");

	timeout = 0;

	send_status = safe_apic_wait_icr_idle();

	do {

		Dprintk("+");

		udelay(100);

		send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;

	} while (send_status && (timeout++ < 1000));





	atomic_set(&init_deasserted, 1);

	atomic_set(&init_deasserted, 1);
@@ -714,12 +699,7 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) 
		Dprintk("Startup point 1.\n");

		Dprintk("Startup point 1.\n");





		Dprintk("Waiting for send to finish...\n");

		Dprintk("Waiting for send to finish...\n");

		timeout = 0;

		send_status = safe_apic_wait_icr_idle();

		do {

			Dprintk("+");

			udelay(100);

			send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;

		} while (send_status && (timeout++ < 1000));





		/*

		/*

		 * Give the other CPU some time to accept the IPI.

		 * Give the other CPU some time to accept the IPI.