Commit ae68efe9 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Dinh Nguyen
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arm64: dts: intel: socfpga_agilex: align node names with dtschema 



Align the NAND, GIC and UART node names with dtschema to silence
dtbs_check warnings like:

    arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
        intc@fffc1000: $nodename:0: 'intc@fffc1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
    arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
        serial0@ffc02000: $nodename:0: 'serial0@ffc02000' does not match '^serial(@[0-9a-f,]+)*$'

Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent f10ffbf5

arch/arm64/boot/dts/intel/socfpga_agilex.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -78,7 +78,7 @@ psci { 
		method = "smc";

	};



	intc: intc@fffc1000 {

	intc: interrupt-controller@fffc1000 {

		compatible = "arm,gic-400", "arm,cortex-a15-gic";

		#interrupt-cells = <3>;

		interrupt-controller;
@@ -316,7 +316,7 @@ mmc: dwmmc0@ff808000 { 
			status = "disabled";

		};



		nand: nand@ffb90000 {

		nand: nand-controller@ffb90000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "altr,socfpga-denali-nand";
@@ -479,7 +479,7 @@ timer3: timer3@ffd00100 { 
			clock-names = "timer";

		};



		uart0: serial0@ffc02000 {

		uart0: serial@ffc02000 {

			compatible = "snps,dw-apb-uart";

			reg = <0xffc02000 0x100>;

			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
@@ -490,7 +490,7 @@ uart0: serial0@ffc02000 { 
			clocks = <&clkmgr AGILEX_L4_SP_CLK>;

		};



		uart1: serial1@ffc02100 {

		uart1: serial@ffc02100 {

			compatible = "snps,dw-apb-uart";

			reg = <0xffc02100 0x100>;

			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;