Unverified Commit b003b3b7 authored by Palmer Dabbelt's avatar Palmer Dabbelt
Browse files

RISC-V: Align the shadow stack 



The standard RISC-V ABIs all require 16-byte stack alignment.  We're
only calling that one function on the shadow stack so I doubt it'd
result in a real issue, but might as well keep this lined up.

Fixes: 31da94c2 ("riscv: add VMAP_STACK overflow detection")
Reviewed-by: default avatarJisheng Zhang <jszhang@kernel.org>
Link: https://lore.kernel.org/r/20221130023515.20217-1-palmer@rivosinc.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 7e186433

arch/riscv/kernel/traps.c

+1 −1
Original line number Diff line number Diff line
@@ -206,7 +206,7 @@ static DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], 
 * shadow stack, handled_ kernel_ stack_ overflow(in kernel/entry.S) is used

 * to get per-cpu overflow stack(get_overflow_stack).

 */

long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE/sizeof(long)];

long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE/sizeof(long)] __aligned(16);

asmlinkage unsigned long get_overflow_stack(void)

{

	return (unsigned long)this_cpu_ptr(overflow_stack) +