Commit b09c1fff authored by Leo (Hanghong) Ma's avatar Leo (Hanghong) Ma Committed by Alex Deucher
Browse files

drm/amd/display: Add support for visual confirm color 



[Why]
We want to get the visual confirm color of the bottom-most pipe
for test automation.

[How]
Save the visual confirm color to plane_state before program to MPC;

Reviewed-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Reviewed-by: default avatarAric Cyr <Aric.Cyr@amd.com>
Acked-by: default avatarBrian Chang <Brian.Chang@amd.com>
Signed-off-by: default avatarLeo (Hanghong) Ma <hanghong.ma@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 36527db3

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -1183,6 +1183,7 @@ struct dc_plane_state { 
	/* private to dc_surface.c */

	enum dc_irq_source irq_source;

	struct kref refcount;

	struct tg_color visual_confirm_color;

};



struct dc_plane_info {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

+31 −0
Original line number Diff line number Diff line
@@ -389,6 +389,37 @@ void dc_dmub_srv_query_caps_cmd(struct dmub_srv *dmub) 
	}

}



void dc_dmub_srv_get_visual_confirm_color_cmd(struct dc *dc, struct pipe_ctx *pipe_ctx)

{

	union dmub_rb_cmd cmd = { 0 };

	enum dmub_status status;

	unsigned int panel_inst = 0;



	dc_get_edp_link_panel_inst(dc, pipe_ctx->stream->link, &panel_inst);



	memset(&cmd, 0, sizeof(cmd));



	// Prepare fw command

	cmd.visual_confirm_color.header.type = DMUB_CMD__GET_VISUAL_CONFIRM_COLOR;

	cmd.visual_confirm_color.header.sub_type = 0;

	cmd.visual_confirm_color.header.ret_status = 1;

	cmd.visual_confirm_color.header.payload_bytes = sizeof(struct dmub_cmd_visual_confirm_color_data);

	cmd.visual_confirm_color.visual_confirm_color_data.visual_confirm_color.panel_inst = panel_inst;



	// Send command to fw

	status = dmub_srv_cmd_with_reply_data(dc->ctx->dmub_srv->dmub, &cmd);



	ASSERT(status == DMUB_STATUS_OK);



	// If command was processed, copy feature caps to dmub srv

	if (status == DMUB_STATUS_OK &&

		cmd.visual_confirm_color.header.ret_status == 0) {

		memcpy(&dc->ctx->dmub_srv->dmub->visual_confirm_color,

			&cmd.visual_confirm_color.visual_confirm_color_data,

			sizeof(struct dmub_visual_confirm_color));

	}

}



#ifdef CONFIG_DRM_AMD_DC_DCN

/**

 * ***********************************************************************************************

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

+1 −0
Original line number Diff line number Diff line
@@ -78,6 +78,7 @@ void dc_dmub_srv_set_drr_manual_trigger_cmd(struct dc *dc, uint32_t tg_inst); 
bool dc_dmub_srv_p_state_delegate(struct dc *dc, bool enable_pstate, struct dc_state *context);



void dc_dmub_srv_query_caps_cmd(struct dmub_srv *dmub);

void dc_dmub_srv_get_visual_confirm_color_cmd(struct dc *dc, struct pipe_ctx *pipe_ctx);

void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dmub_srv);

void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dmub_srv);

void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, union dmub_inbox0_data_register data);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+3 −1
Original line number Diff line number Diff line
@@ -2539,9 +2539,11 @@ void dcn10_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx, 
		color_space_to_black_color(

				dc, pipe_ctx->stream->output_color_space, color);



	if (mpc->funcs->set_bg_color)

	if (mpc->funcs->set_bg_color) {

		memcpy(&pipe_ctx->plane_state->visual_confirm_color, color, sizeof(struct tg_color));

		mpc->funcs->set_bg_color(mpc, color, mpcc_id);

	}

}



void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)

{

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

+3 −1
Original line number Diff line number Diff line
@@ -2466,9 +2466,11 @@ void dcn20_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx, 
	else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SWIZZLE)

		get_surface_tile_visual_confirm_color(pipe_ctx, color);



	if (mpc->funcs->set_bg_color)

	if (mpc->funcs->set_bg_color) {

		memcpy(&pipe_ctx->plane_state->visual_confirm_color, color, sizeof(struct tg_color));

		mpc->funcs->set_bg_color(mpc, color, mpcc_id);

	}

}



void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)

{