Commit b0efb45d authored by Andrew Davis's avatar Andrew Davis Committed by Vignesh Raghavendra
Browse files

arm64: dts: ti: k3-j721e: Enable MDIO nodes at the board level



MDIO nodes defined in the top-level J721e SoC dtsi files are incomplete
and will not be functional unless they are extended with a pinmux.

As the attached PHY is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the MDIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: default avatarAndrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230515172137.474626-5-afd@ti.com


Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
parent 91f983ff
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+0 −10
Original line number Diff line number Diff line
@@ -883,16 +883,6 @@ &pcie1_rc {
	reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_HIGH>;
};

&icssg0_mdio {
	/* Unused */
	status = "disabled";
};

&icssg1_mdio {
	/* Unused */
	status = "disabled";
};

&ufs_wrapper {
	status = "disabled";
};
+0 −8
Original line number Diff line number Diff line
@@ -842,14 +842,6 @@ &pcie2_rc {
	num-lanes = <2>;
};

&icssg0_mdio {
	status = "disabled";
};

&icssg1_mdio {
	status = "disabled";
};

&mcu_mcan0 {
	status = "okay";
	pinctrl-names = "default";
+2 −0
Original line number Diff line number Diff line
@@ -2015,6 +2015,7 @@ icssg0_mdio: mdio@32400 {
			#address-cells = <1>;
			#size-cells = <0>;
			bus_freq = <1000000>;
			status = "disabled";
		};
	};

@@ -2156,6 +2157,7 @@ icssg1_mdio: mdio@32400 {
			#address-cells = <1>;
			#size-cells = <0>;
			bus_freq = <1000000>;
			status = "disabled";
		};
	};

+0 −8
Original line number Diff line number Diff line
@@ -892,14 +892,6 @@ &pcie1_rc {
	num-lanes = <2>;
};

&icssg0_mdio {
	status = "disabled";
};

&icssg1_mdio {
	status = "disabled";
};

&ufs_wrapper {
	status = "disabled";
};