Commit b100274c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control fixes from Linus Walleij:
 "There is an ACPI stubs fix which is ACKed by the ACPI maintainer for
  merging through my tree.

  One item stand out and that is that I delete the <linux/sdb.h> header
  that is used by nothing. I deleted this subsystem (through the GPIO
  tree) a while back so I feel responsible for tidying up the floor.

  Other than that it is the usual mistakes, a bit noisy around build
  issue and Kconfig then driver fixes.

  Specifics:

   - Fix some stubs causing compile issues for ACPI.

   - Fix some wakeups on AMD IRQs shared between GPIO and SCI.

   - Fix a build warning in the Tegra driver.

   - Fix a Kconfig issue in the Qualcomm driver.

   - Add a missing include the RALink driver.

   - Return a valid type for the Apple pinctrl IRQs.

   - Implement some Qualcomm SDM845 dual-edge errata.

   - Remove the unused <linux/sdb.h> header. (The subsystem was once
     deleted by the pinctrl maintainer...)

   - Fix a duplicate initialized in the Tegra driver.

   - Fix register offsets for UFS and SDC in the Qualcomm SM8350 driver"

* tag 'pinctrl-v5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: qcom: sm8350: Correct UFS and SDC offsets
  pinctrl: tegra194: remove duplicate initializer again
  Remove unused header <linux/sdb.h>
  pinctrl: qcom: sdm845: Enable dual edge errata
  pinctrl: apple: Always return valid type in apple_gpio_irq_type
  pinctrl: ralink: include 'ralink_regs.h' in 'pinctrl-mt7620.c'
  pinctrl: qcom: fix unmet dependencies on GPIOLIB for GPIOLIB_IRQCHIP
  pinctrl: tegra: Return const pointer from tegra_pinctrl_get_group()
  pinctrl: amd: Fix wakeups when IRQ is shared with SCI
  ACPI: Add stubs for wakeup handler functions
parents 6b38e2fb 62209e80

drivers/pinctrl/pinctrl-amd.c

+26 −3
Original line number Diff line number Diff line
@@ -598,14 +598,14 @@ static struct irq_chip amd_gpio_irqchip = { 


#define PIN_IRQ_PENDING	(BIT(INTERRUPT_STS_OFF) | BIT(WAKE_STS_OFF))



static irqreturn_t amd_gpio_irq_handler(int irq, void *dev_id)

static bool do_amd_gpio_irq_handler(int irq, void *dev_id)

{

	struct amd_gpio *gpio_dev = dev_id;

	struct gpio_chip *gc = &gpio_dev->gc;

	irqreturn_t ret = IRQ_NONE;

	unsigned int i, irqnr;

	unsigned long flags;

	u32 __iomem *regs;

	bool ret = false;

	u32  regval;

	u64 status, mask;
@@ -627,6 +627,14 @@ static irqreturn_t amd_gpio_irq_handler(int irq, void *dev_id) 
		/* Each status bit covers four pins */

		for (i = 0; i < 4; i++) {

			regval = readl(regs + i);

			/* caused wake on resume context for shared IRQ */

			if (irq < 0 && (regval & BIT(WAKE_STS_OFF))) {

				dev_dbg(&gpio_dev->pdev->dev,

					"Waking due to GPIO %d: 0x%x",

					irqnr + i, regval);

				return true;

			}



			if (!(regval & PIN_IRQ_PENDING) ||

			    !(regval & BIT(INTERRUPT_MASK_OFF)))

				continue;
@@ -650,9 +658,12 @@ static irqreturn_t amd_gpio_irq_handler(int irq, void *dev_id) 
			}

			writel(regval, regs + i);

			raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);

			ret = IRQ_HANDLED;

			ret = true;

		}

	}

	/* did not cause wake on resume context for shared IRQ */

	if (irq < 0)

		return false;



	/* Signal EOI to the GPIO unit */

	raw_spin_lock_irqsave(&gpio_dev->lock, flags);
@@ -664,6 +675,16 @@ static irqreturn_t amd_gpio_irq_handler(int irq, void *dev_id) 
	return ret;

}



static irqreturn_t amd_gpio_irq_handler(int irq, void *dev_id)

{

	return IRQ_RETVAL(do_amd_gpio_irq_handler(irq, dev_id));

}



static bool __maybe_unused amd_gpio_check_wake(void *dev_id)

{

	return do_amd_gpio_irq_handler(-1, dev_id);

}



static int amd_get_groups_count(struct pinctrl_dev *pctldev)

{

	struct amd_gpio *gpio_dev = pinctrl_dev_get_drvdata(pctldev);
@@ -1033,6 +1054,7 @@ static int amd_gpio_probe(struct platform_device *pdev) 
		goto out2;



	platform_set_drvdata(pdev, gpio_dev);

	acpi_register_wakeup_handler(gpio_dev->irq, amd_gpio_check_wake, gpio_dev);



	dev_dbg(&pdev->dev, "amd gpio driver loaded\n");

	return ret;
@@ -1050,6 +1072,7 @@ static int amd_gpio_remove(struct platform_device *pdev) 
	gpio_dev = platform_get_drvdata(pdev);



	gpiochip_remove(&gpio_dev->gc);

	acpi_unregister_wakeup_handler(amd_gpio_check_wake, gpio_dev);



	return 0;

}

drivers/pinctrl/pinctrl-apple-gpio.c

+6 −6
Original line number Diff line number Diff line
@@ -258,7 +258,7 @@ static void apple_gpio_irq_ack(struct irq_data *data) 
	       pctl->base + REG_IRQ(irqgrp, data->hwirq));

}



static int apple_gpio_irq_type(unsigned int type)

static unsigned int apple_gpio_irq_type(unsigned int type)

{

	switch (type & IRQ_TYPE_SENSE_MASK) {

	case IRQ_TYPE_EDGE_RISING:
@@ -272,7 +272,7 @@ static int apple_gpio_irq_type(unsigned int type) 
	case IRQ_TYPE_LEVEL_LOW:

		return REG_GPIOx_IN_IRQ_LO;

	default:

		return -EINVAL;

		return REG_GPIOx_IN_IRQ_OFF;

	}

}
@@ -288,7 +288,7 @@ static void apple_gpio_irq_unmask(struct irq_data *data) 
{

	struct apple_gpio_pinctrl *pctl =

		gpiochip_get_data(irq_data_get_irq_chip_data(data));

	int irqtype = apple_gpio_irq_type(irqd_get_trigger_type(data));

	unsigned int irqtype = apple_gpio_irq_type(irqd_get_trigger_type(data));



	apple_gpio_set_reg(pctl, data->hwirq, REG_GPIOx_MODE,

			   FIELD_PREP(REG_GPIOx_MODE, irqtype));
@@ -313,10 +313,10 @@ static int apple_gpio_irq_set_type(struct irq_data *data, 
{

	struct apple_gpio_pinctrl *pctl =

		gpiochip_get_data(irq_data_get_irq_chip_data(data));

	int irqtype = apple_gpio_irq_type(type);

	unsigned int irqtype = apple_gpio_irq_type(type);



	if (irqtype < 0)

		return irqtype;

	if (irqtype == REG_GPIOx_IN_IRQ_OFF)

		return -EINVAL;



	apple_gpio_set_reg(pctl, data->hwirq, REG_GPIOx_MODE,

			   FIELD_PREP(REG_GPIOx_MODE, irqtype));

drivers/pinctrl/qcom/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -197,6 +197,7 @@ config PINCTRL_QCOM_SPMI_PMIC 
	select PINMUX

	select PINCONF

	select GENERIC_PINCONF

  select GPIOLIB

	select GPIOLIB_IRQCHIP

	select IRQ_DOMAIN_HIERARCHY

	help
@@ -211,6 +212,7 @@ config PINCTRL_QCOM_SSBI_PMIC 
	select PINMUX

	select PINCONF

	select GENERIC_PINCONF

  select GPIOLIB

	select GPIOLIB_IRQCHIP

	select IRQ_DOMAIN_HIERARCHY

	help

drivers/pinctrl/qcom/pinctrl-sdm845.c

+1 −0
Original line number Diff line number Diff line
@@ -1310,6 +1310,7 @@ static const struct msm_pinctrl_soc_data sdm845_pinctrl = { 
	.ngpios = 151,

	.wakeirq_map = sdm845_pdc_map,

	.nwakeirq_map = ARRAY_SIZE(sdm845_pdc_map),

	.wakeirq_dual_edge_errata = true,

};



static const struct msm_pinctrl_soc_data sdm845_acpi_pinctrl = {

drivers/pinctrl/qcom/pinctrl-sm8350.c

+4 −4
Original line number Diff line number Diff line
@@ -1597,10 +1597,10 @@ static const struct msm_pingroup sm8350_groups[] = { 
	[200] = PINGROUP(200, qdss_gpio, _, _, _, _, _, _, _, _),

	[201] = PINGROUP(201, _, _, _, _, _, _, _, _, _),

	[202] = PINGROUP(202, _, _, _, _, _, _, _, _, _),

	[203] = UFS_RESET(ufs_reset, 0x1d8000),

	[204] = SDC_PINGROUP(sdc2_clk, 0x1cf000, 14, 6),

	[205] = SDC_PINGROUP(sdc2_cmd, 0x1cf000, 11, 3),

	[206] = SDC_PINGROUP(sdc2_data, 0x1cf000, 9, 0),

	[203] = UFS_RESET(ufs_reset, 0xd8000),

	[204] = SDC_PINGROUP(sdc2_clk, 0xcf000, 14, 6),

	[205] = SDC_PINGROUP(sdc2_cmd, 0xcf000, 11, 3),

	[206] = SDC_PINGROUP(sdc2_data, 0xcf000, 9, 0),

};



static const struct msm_gpio_wakeirq_map sm8350_pdc_map[] = {