Commit b21348a2 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amdgpu: enable fgcg for soc21 



Enable Fine Grained Clock Gating on soc21 asics.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 390db4b8

drivers/gpu/drm/amd/amdgpu/soc21.c

+2 −1
Original line number Diff line number Diff line
@@ -481,7 +481,8 @@ static int soc21_common_early_init(void *handle) 
	switch (adev->ip_versions[GC_HWIP][0]) {

	case IP_VERSION(11, 0, 0):

		adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG |

			AMD_CG_SUPPORT_GFX_CGLS;

			AMD_CG_SUPPORT_GFX_CGLS |

			AMD_CG_SUPPORT_REPEATER_FGCG;

		adev->pg_flags = AMD_PG_SUPPORT_ATHUB |

			AMD_PG_SUPPORT_MMHUB;

		adev->external_rev_id = adev->rev_id + 0x1; // TODO: need update