Loading arch/sparc/boot/piggyback_32.c +3 −3 Original line number Diff line number Diff line Loading @@ -73,9 +73,9 @@ static void usage(void) static int start_line(const char *line) { if (strcmp(line + 8, " T start\n") == 0) if (strcmp(line + 8, " T _start\n") == 0) return 1; else if (strcmp(line + 16, " T start\n") == 0) else if (strcmp(line + 16, " T _start\n") == 0) return 1; return 0; } Loading @@ -92,7 +92,7 @@ static int end_line(const char *line) /* * Find address for start and end in System.map. * The file looks like this: * f0004000 T start * f0004000 T _start * f0379f79 A _end * 1234567890123456 * ^coloumn 1 Loading arch/sparc/kernel/head_32.S +1 −2 Original line number Diff line number Diff line Loading @@ -73,12 +73,11 @@ sun4e_notsup: /* The Sparc trap table, bootloader gives us control at _start. */ __HEAD .globl start, _stext, _start, __stext .globl _stext, _start, __stext .globl trapbase _start: /* danger danger */ __stext: _stext: start: trapbase: #ifdef CONFIG_SMP trapbase_cpu0: Loading arch/sparc/mm/sun4c.c +3 −5 Original line number Diff line number Diff line Loading @@ -435,16 +435,14 @@ void __init sun4c_probe_memerr_reg(void) static inline void sun4c_init_ss2_cache_bug(void) { extern unsigned long start; if ((idprom->id_machtype == (SM_SUN4C | SM_4C_SS2)) || (idprom->id_machtype == (SM_SUN4C | SM_4C_IPX)) || (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC))) { /* Whee.. */ printk("SS2 cache bug detected, uncaching trap table page\n"); sun4c_flush_page((unsigned int) &start); sun4c_put_pte(((unsigned long) &start), (sun4c_get_pte((unsigned long) &start) | _SUN4C_PAGE_NOCACHE)); sun4c_flush_page((unsigned int) &_start); sun4c_put_pte(((unsigned long) &_start), (sun4c_get_pte((unsigned long) &_start) | _SUN4C_PAGE_NOCACHE)); } } Loading Loading
arch/sparc/boot/piggyback_32.c +3 −3 Original line number Diff line number Diff line Loading @@ -73,9 +73,9 @@ static void usage(void) static int start_line(const char *line) { if (strcmp(line + 8, " T start\n") == 0) if (strcmp(line + 8, " T _start\n") == 0) return 1; else if (strcmp(line + 16, " T start\n") == 0) else if (strcmp(line + 16, " T _start\n") == 0) return 1; return 0; } Loading @@ -92,7 +92,7 @@ static int end_line(const char *line) /* * Find address for start and end in System.map. * The file looks like this: * f0004000 T start * f0004000 T _start * f0379f79 A _end * 1234567890123456 * ^coloumn 1 Loading
arch/sparc/kernel/head_32.S +1 −2 Original line number Diff line number Diff line Loading @@ -73,12 +73,11 @@ sun4e_notsup: /* The Sparc trap table, bootloader gives us control at _start. */ __HEAD .globl start, _stext, _start, __stext .globl _stext, _start, __stext .globl trapbase _start: /* danger danger */ __stext: _stext: start: trapbase: #ifdef CONFIG_SMP trapbase_cpu0: Loading
arch/sparc/mm/sun4c.c +3 −5 Original line number Diff line number Diff line Loading @@ -435,16 +435,14 @@ void __init sun4c_probe_memerr_reg(void) static inline void sun4c_init_ss2_cache_bug(void) { extern unsigned long start; if ((idprom->id_machtype == (SM_SUN4C | SM_4C_SS2)) || (idprom->id_machtype == (SM_SUN4C | SM_4C_IPX)) || (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC))) { /* Whee.. */ printk("SS2 cache bug detected, uncaching trap table page\n"); sun4c_flush_page((unsigned int) &start); sun4c_put_pte(((unsigned long) &start), (sun4c_get_pte((unsigned long) &start) | _SUN4C_PAGE_NOCACHE)); sun4c_flush_page((unsigned int) &_start); sun4c_put_pte(((unsigned long) &_start), (sun4c_get_pte((unsigned long) &_start) | _SUN4C_PAGE_NOCACHE)); } } Loading