Commit b2fa90ef authored by Christophe Leroy's avatar Christophe Leroy Committed by Borislav Petkov
Browse files

powerpc/85xx: Remove fsl,85... bindings 



Since

  8a4ab218 ("powerpc/85xx: Change deprecated binding for 85xx-based boards")

those bindings are not used anymore.

A comment in drivers/edac/mpc85xx_edac.c say they are to be removed
with kernel 2.6.30.

Remove them now.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: default avatarScott Wood <oss@buserror.net>
Link: https://lore.kernel.org/r/82a8bc4450a4daee50ee5fada75621fecb3703ff.1648721299.git.christophe.leroy@csgroup.eu
parent 31231092

Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml

+0 −6
Original line number Diff line number Diff line
@@ -25,12 +25,6 @@ properties: 
          - const: fsl,qoriq-memory-controller

      - enum:

          - fsl,bsc9132-memory-controller

          - fsl,8540-memory-controller

          - fsl,8541-memory-controller

          - fsl,8544-memory-controller

          - fsl,8548-memory-controller

          - fsl,8555-memory-controller

          - fsl,8568-memory-controller

          - fsl,mpc8536-memory-controller

          - fsl,mpc8540-memory-controller

          - fsl,mpc8541-memory-controller

Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt

+0 −6
Original line number Diff line number Diff line
@@ -6,12 +6,6 @@ The cache bindings explained below are Devicetree Specification compliant 
Required Properties:



- compatible	: Should include one of the following:

		  "fsl,8540-l2-cache-controller"

		  "fsl,8541-l2-cache-controller"

		  "fsl,8544-l2-cache-controller"

		  "fsl,8548-l2-cache-controller"

		  "fsl,8555-l2-cache-controller"

		  "fsl,8568-l2-cache-controller"

		  "fsl,b4420-l2-cache-controller"

		  "fsl,b4860-l2-cache-controller"

		  "fsl,bsc9131-l2-cache-controller"

drivers/edac/mpc85xx_edac.c

+0 −14
Original line number Diff line number Diff line
@@ -609,13 +609,6 @@ static int mpc85xx_l2_err_remove(struct platform_device *op) 
}



static const struct of_device_id mpc85xx_l2_err_of_match[] = {

/* deprecate the fsl,85.. forms in the future, 2.6.30? */

	{ .compatible = "fsl,8540-l2-cache-controller", },

	{ .compatible = "fsl,8541-l2-cache-controller", },

	{ .compatible = "fsl,8544-l2-cache-controller", },

	{ .compatible = "fsl,8548-l2-cache-controller", },

	{ .compatible = "fsl,8555-l2-cache-controller", },

	{ .compatible = "fsl,8568-l2-cache-controller", },

	{ .compatible = "fsl,mpc8536-l2-cache-controller", },

	{ .compatible = "fsl,mpc8540-l2-cache-controller", },

	{ .compatible = "fsl,mpc8541-l2-cache-controller", },
@@ -644,13 +637,6 @@ static struct platform_driver mpc85xx_l2_err_driver = { 
};



static const struct of_device_id mpc85xx_mc_err_of_match[] = {

/* deprecate the fsl,85.. forms in the future, 2.6.30? */

	{ .compatible = "fsl,8540-memory-controller", },

	{ .compatible = "fsl,8541-memory-controller", },

	{ .compatible = "fsl,8544-memory-controller", },

	{ .compatible = "fsl,8548-memory-controller", },

	{ .compatible = "fsl,8555-memory-controller", },

	{ .compatible = "fsl,8568-memory-controller", },

	{ .compatible = "fsl,mpc8536-memory-controller", },

	{ .compatible = "fsl,mpc8540-memory-controller", },

	{ .compatible = "fsl,mpc8541-memory-controller", },