Commit b318c53e authored by Vladimir Zapolskiy's avatar Vladimir Zapolskiy Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sm8450: Add description of camera control interfaces 



Add description of two CCI controllers found on QCOM SM8450.

Signed-off-by: default avatarVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220901073504.3077363-1-vladimir.zapolskiy@linaro.org
parent 2f72a4f5

arch/arm64/boot/dts/qcom/sm8450.dtsi

+142 −0
Original line number Diff line number Diff line
@@ -2307,6 +2307,84 @@ IPCC_MPROC_SIGNAL_GLINK_QMP 
			};

		};



		cci0: cci@ac15000 {

			compatible = "qcom,sm8450-cci";

			reg = <0 0xac15000 0 0x1000>;

			interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;

			power-domains = <&camcc TITAN_TOP_GDSC>;



			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,

				 <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,

				 <&camcc CAM_CC_CPAS_AHB_CLK>,

				 <&camcc CAM_CC_CCI_0_CLK>,

				 <&camcc CAM_CC_CCI_0_CLK_SRC>;

			clock-names = "camnoc_axi",

				      "slow_ahb_src",

				      "cpas_ahb",

				      "cci",

				      "cci_src";

			pinctrl-0 = <&cci0_default &cci1_default>;

			pinctrl-1 = <&cci0_sleep &cci1_sleep>;

			pinctrl-names = "default", "sleep";



			status = "disabled";

			#address-cells = <1>;

			#size-cells = <0>;



			cci0_i2c0: i2c-bus@0 {

				reg = <0>;

				clock-frequency = <1000000>;

				#address-cells = <1>;

				#size-cells = <0>;

			};



			cci0_i2c1: i2c-bus@1 {

				reg = <1>;

				clock-frequency = <1000000>;

				#address-cells = <1>;

				#size-cells = <0>;

			};

		};



		cci1: cci@ac16000 {

			compatible = "qcom,sm8450-cci";

			reg = <0 0xac16000 0 0x1000>;

			interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>;

			power-domains = <&camcc TITAN_TOP_GDSC>;



			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,

				 <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,

				 <&camcc CAM_CC_CPAS_AHB_CLK>,

				 <&camcc CAM_CC_CCI_1_CLK>,

				 <&camcc CAM_CC_CCI_1_CLK_SRC>;

			clock-names = "camnoc_axi",

				      "slow_ahb_src",

				      "cpas_ahb",

				      "cci",

				      "cci_src";

			pinctrl-0 = <&cci2_default &cci3_default>;

			pinctrl-1 = <&cci2_sleep &cci3_sleep>;

			pinctrl-names = "default", "sleep";



			status = "disabled";

			#address-cells = <1>;

			#size-cells = <0>;



			cci1_i2c0: i2c-bus@0 {

				reg = <0>;

				clock-frequency = <1000000>;

				#address-cells = <1>;

				#size-cells = <0>;

			};



			cci1_i2c1: i2c-bus@1 {

				reg = <1>;

				clock-frequency = <1000000>;

				#address-cells = <1>;

				#size-cells = <0>;

			};

		};



		camcc: clock-controller@ade0000 {

			compatible = "qcom,sm8450-camcc";

			reg = <0 0x0ade0000 0 0x20000>;
@@ -2404,6 +2482,70 @@ data-pins { 
				};

			};



			cci0_default: cci0-default-state {

				/* SDA, SCL */

				pins = "gpio110", "gpio111";

				function = "cci_i2c";

				drive-strength = <2>;

				bias-pull-up;

			};



			cci0_sleep: cci0-sleep-state {

				/* SDA, SCL */

				pins = "gpio110", "gpio111";

				function = "cci_i2c";

				drive-strength = <2>;

				bias-pull-down;

			};



			cci1_default: cci1-default-state {

				/* SDA, SCL */

				pins = "gpio112", "gpio113";

				function = "cci_i2c";

				drive-strength = <2>;

				bias-pull-up;

			};



			cci1_sleep: cci1-sleep-state {

				/* SDA, SCL */

				pins = "gpio112", "gpio113";

				function = "cci_i2c";

				drive-strength = <2>;

				bias-pull-down;

			};



			cci2_default: cci2-default-state {

				/* SDA, SCL */

				pins = "gpio114", "gpio115";

				function = "cci_i2c";

				drive-strength = <2>;

				bias-pull-up;

			};



			cci2_sleep: cci2-sleep-state {

				/* SDA, SCL */

				pins = "gpio114", "gpio115";

				function = "cci_i2c";

				drive-strength = <2>;

				bias-pull-down;

			};



			cci3_default: cci3-default-state {

				/* SDA, SCL */

				pins = "gpio208", "gpio209";

				function = "cci_i2c";

				drive-strength = <2>;

				bias-pull-up;

			};



			cci3_sleep: cci3-sleep-state {

				/* SDA, SCL */

				pins = "gpio208", "gpio209";

				function = "cci_i2c";

				drive-strength = <2>;

				bias-pull-down;

			};



			pcie0_default_state: pcie0-default-state {

				perst-pins {

					pins = "gpio94";