Commit b4520bfd authored by Gavin Wan's avatar Gavin Wan Committed by Alex Deucher
Browse files

drm/amdgpu: Checked if the pointer NULL before use it.



For SRIOV on some parts, the host driver does not post VBIOS. So the guest
cannot get bios information. Therefore, adev->virt.fw_reserve.p_pf2vf
and adev->mode_info.atom_context are NULL.

Signed-off-by: default avatarGavin Wan <Gavin.Wan@amd.com>
Reviewed-by: default avatarZhigang Luo <Zhigang.Luo@amd.com>
Acked-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 46f7b4de
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+12 −8
Original line number Diff line number Diff line
@@ -3855,21 +3855,24 @@ int amdgpu_device_init(struct amdgpu_device *adev,
	}

	/* enable PCIE atomic ops */
	if (amdgpu_sriov_vf(adev))
	if (amdgpu_sriov_vf(adev)) {
		if (adev->virt.fw_reserve.p_pf2vf)
			adev->have_atomics_support = ((struct amd_sriov_msg_pf2vf_info *)
						      adev->virt.fw_reserve.p_pf2vf)->pcie_atomic_ops_support_flags ==
				(PCI_EXP_DEVCAP2_ATOMIC_COMP32 | PCI_EXP_DEVCAP2_ATOMIC_COMP64);
	/* APUs w/ gfx9 onwards doesn't reply on PCIe atomics, rather it is a
	 * internal path natively support atomics, set have_atomics_support to true.
	 */
	else if ((adev->flags & AMD_IS_APU) &&
		(adev->ip_versions[GC_HWIP][0] > IP_VERSION(9, 0, 0)))
	} else if ((adev->flags & AMD_IS_APU) &&
		   (adev->ip_versions[GC_HWIP][0] > IP_VERSION(9, 0, 0))) {
		adev->have_atomics_support = true;
	else
	} else {
		adev->have_atomics_support =
			!pci_enable_atomic_ops_to_root(adev->pdev,
					  PCI_EXP_DEVCAP2_ATOMIC_COMP32 |
					  PCI_EXP_DEVCAP2_ATOMIC_COMP64);
	}

	if (!adev->have_atomics_support)
		dev_info(adev->dev, "PCIE atomic ops is not supported\n");

@@ -3885,6 +3888,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
	amdgpu_reset_init(adev);

	/* detect if we are with an SRIOV vbios */
	if (adev->bios)
		amdgpu_device_detect_sriov_bios(adev);

	/* check if we need to reset the asic