Loading arch/arm/boot/dts/mmp2.dtsi +12 −0 Original line number Diff line number Diff line Loading @@ -5,6 +5,7 @@ */ #include <dt-bindings/clock/marvell,mmp2.h> #include <dt-bindings/power/marvell,mmp2.h> / { #address-cells = <1>; Loading Loading @@ -38,6 +39,17 @@ axi@d4200000 { /* AXI */ reg = <0xd4200000 0x00200000>; ranges; gpu: gpu@d420d000 { compatible = "vivante,gc"; reg = <0xd420d000 0x4000>; interrupts = <8>; status = "disabled"; clocks = <&soc_clocks MMP2_CLK_GPU_3D>, <&soc_clocks MMP2_CLK_GPU_BUS>; clock-names = "core", "bus"; power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>; }; intc: interrupt-controller@d4282000 { compatible = "mrvl,mmp2-intc"; interrupt-controller; Loading Loading
arch/arm/boot/dts/mmp2.dtsi +12 −0 Original line number Diff line number Diff line Loading @@ -5,6 +5,7 @@ */ #include <dt-bindings/clock/marvell,mmp2.h> #include <dt-bindings/power/marvell,mmp2.h> / { #address-cells = <1>; Loading Loading @@ -38,6 +39,17 @@ axi@d4200000 { /* AXI */ reg = <0xd4200000 0x00200000>; ranges; gpu: gpu@d420d000 { compatible = "vivante,gc"; reg = <0xd420d000 0x4000>; interrupts = <8>; status = "disabled"; clocks = <&soc_clocks MMP2_CLK_GPU_3D>, <&soc_clocks MMP2_CLK_GPU_BUS>; clock-names = "core", "bus"; power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>; }; intc: interrupt-controller@d4282000 { compatible = "mrvl,mmp2-intc"; interrupt-controller; Loading