Commit b823defe authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
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drm/amd/display: Fixed mpc add, enable always scaler for video surface. 



Signed-off-by: default avatarYongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8eb5def9

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c

+3 −3
Original line number Diff line number Diff line
@@ -229,9 +229,9 @@ static void mpc10_mpcc_add(struct mpc *mpc, struct mpcc_cfg *cfg) 
	mpc10_set_bg_color(mpc10, &cfg->black_color, mpcc_id);



	mpc10->mpcc_in_use_mask |= 1 << mpcc_id;

	for (z_idx = cfg->z_index; z_idx < cfg->opp->mpc_tree.num_pipes; z_idx++) {

		cfg->opp->mpc_tree.dpp[z_idx + 1] = cfg->opp->mpc_tree.dpp[z_idx];

		cfg->opp->mpc_tree.mpcc[z_idx + 1] = cfg->opp->mpc_tree.mpcc[z_idx];

	for (z_idx = cfg->opp->mpc_tree.num_pipes; z_idx > cfg->z_index; z_idx--) {

		cfg->opp->mpc_tree.dpp[z_idx] = cfg->opp->mpc_tree.dpp[z_idx - 1];

		cfg->opp->mpc_tree.mpcc[z_idx] = cfg->opp->mpc_tree.mpcc[z_idx - 1];

	}

	cfg->opp->mpc_tree.dpp[cfg->z_index] = cfg->mi->inst;

	cfg->opp->mpc_tree.mpcc[cfg->z_index] = mpcc_id;

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c

+4 −0
Original line number Diff line number Diff line
@@ -422,6 +422,10 @@ static const struct dc_debug debug_defaults_drv = { 
		.force_abm_enable = false,

		.timing_trace = false,

		.clock_trace = true,

		/* spread sheet doesn't handle taps_c is one properly,

		 * need to enable scaler for video surface to pass

		 * bandwidth validation.*/

		.always_scale = true,

		.disable_pplib_clock_request = true,

		.disable_pplib_wm_range = false,

#if defined(CONFIG_DRM_AMD_DC_DCN1_0)