Commit b85bd945 authored by Marco Chiappero's avatar Marco Chiappero Committed by Herbert Xu
Browse files

crypto: qat - relocate PFVF PF related logic 



Move device specific PFVF logic related to the PF to the newly created
adf_gen2_pfvf.c.
This refactory is done to isolate the GEN2 PFVF code into its own file
in preparation for the introduction of support for PFVF for GEN4
devices.

In addition the PFVF PF logic for dh895xcc has been isolated to
adf_dh895xcc_hw_data.c.

Signed-off-by: default avatarMarco Chiappero <marco.chiappero@intel.com>
Co-developed-by: default avatarGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: default avatarGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 1d613312

drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c

+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ 
#include <adf_common_drv.h>

#include <adf_pf2vf_msg.h>

#include <adf_gen2_hw_data.h>

#include <adf_gen2_pfvf.h>

#include "adf_c3xxx_hw_data.h"

#include "icp_qat_hw.h"

drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c

+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ 
#include <adf_common_drv.h>

#include <adf_pf2vf_msg.h>

#include <adf_gen2_hw_data.h>

#include <adf_gen2_pfvf.h>

#include "adf_c62x_hw_data.h"

#include "icp_qat_hw.h"

drivers/crypto/qat/qat_common/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -16,7 +16,8 @@ intel_qat-objs := adf_cfg.o \ 
	qat_algs.o \

	qat_asym_algs.o \

	qat_uclo.o \

	qat_hal.o

	qat_hal.o \

	adf_gen2_pfvf.o



intel_qat-$(CONFIG_DEBUG_FS) += adf_transport_debug.o

intel_qat-$(CONFIG_PCI_IOV) += adf_sriov.o adf_pf2vf_msg.o \

drivers/crypto/qat/qat_common/adf_gen2_hw_data.c

+0 −48
Original line number Diff line number Diff line
@@ -4,54 +4,6 @@ 
#include "icp_qat_hw.h"

#include <linux/pci.h>



#define ADF_GEN2_PF2VF_OFFSET(i)	(0x3A000 + 0x280 + ((i) * 0x04))



u32 adf_gen2_get_pf2vf_offset(u32 i)

{

	return ADF_GEN2_PF2VF_OFFSET(i);

}

EXPORT_SYMBOL_GPL(adf_gen2_get_pf2vf_offset);



u32 adf_gen2_get_vf2pf_sources(void __iomem *pmisc_addr)

{

	u32 errsou3, errmsk3, vf_int_mask;



	/* Get the interrupt sources triggered by VFs */

	errsou3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRSOU3);

	vf_int_mask = ADF_GEN2_ERR_REG_VF2PF(errsou3);



	/* To avoid adding duplicate entries to work queue, clear

	 * vf_int_mask_sets bits that are already masked in ERRMSK register.

	 */

	errmsk3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3);

	vf_int_mask &= ~ADF_GEN2_ERR_REG_VF2PF(errmsk3);



	return vf_int_mask;

}

EXPORT_SYMBOL_GPL(adf_gen2_get_vf2pf_sources);



void adf_gen2_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask)

{

	/* Enable VF2PF Messaging Ints - VFs 0 through 15 per vf_mask[15:0] */

	if (vf_mask & 0xFFFF) {

		u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3)

			  & ~ADF_GEN2_ERR_MSK_VF2PF(vf_mask);

		ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val);

	}

}

EXPORT_SYMBOL_GPL(adf_gen2_enable_vf2pf_interrupts);



void adf_gen2_disable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask)

{

	/* Disable VF2PF interrupts for VFs 0 through 15 per vf_mask[15:0] */

	if (vf_mask & 0xFFFF) {

		u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3)

			  | ADF_GEN2_ERR_MSK_VF2PF(vf_mask);

		ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val);

	}

}

EXPORT_SYMBOL_GPL(adf_gen2_disable_vf2pf_interrupts);



u32 adf_gen2_get_num_accels(struct adf_hw_device_data *self)

{

	if (!self || !self->accel_mask)

drivers/crypto/qat/qat_common/adf_gen2_hw_data.h

+0 −13
Original line number Diff line number Diff line
@@ -136,19 +136,6 @@ do { \ 
#define ADF_GEN2_CERRSSMSH(i)		((i) * 0x4000 + 0x10)

#define ADF_GEN2_ERRSSMSH_EN		BIT(3)



 /* VF2PF interrupts */

#define ADF_GEN2_ERRSOU3 (0x3A000 + 0x0C)

#define ADF_GEN2_ERRSOU5 (0x3A000 + 0xD8)

#define ADF_GEN2_ERRMSK3 (0x3A000 + 0x1C)

#define ADF_GEN2_ERRMSK5 (0x3A000 + 0xDC)

#define ADF_GEN2_ERR_REG_VF2PF(vf_src)	(((vf_src) & 0x01FFFE00) >> 9)

#define ADF_GEN2_ERR_MSK_VF2PF(vf_mask)	(((vf_mask) & 0xFFFF) << 9)



u32 adf_gen2_get_pf2vf_offset(u32 i);

u32 adf_gen2_get_vf2pf_sources(void __iomem *pmisc_bar);

void adf_gen2_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask);

void adf_gen2_disable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask);



u32 adf_gen2_get_num_accels(struct adf_hw_device_data *self);

u32 adf_gen2_get_num_aes(struct adf_hw_device_data *self);

void adf_gen2_enable_error_correction(struct adf_accel_dev *accel_dev);